From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail.bootlin.com ([62.4.15.54]) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1fVCjC-0005Fc-CC for linux-mtd@lists.infradead.org; Tue, 19 Jun 2018 09:15:09 +0000 Date: Tue, 19 Jun 2018 11:14:44 +0200 From: Miquel Raynal To: Masahiro Yamada Cc: linux-mtd@lists.infradead.org, Boris Brezillon , Rob Herring , linux-kbuild@vger.kernel.org, Richard Weinberger , "linux-stable #4 . 14+" , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Marek Vasut , Brian Norris , David Woodhouse , Mark Rutland Subject: Re: [PATCH v3 1/3] mtd: rawnand: denali_dt: add more clocks based on IP datasheet Message-ID: <20180619111444.5303c8ed@xps13> In-Reply-To: <1529025532-22087-2-git-send-email-yamada.masahiro@socionext.com> References: <1529025532-22087-1-git-send-email-yamada.masahiro@socionext.com> <1529025532-22087-2-git-send-email-yamada.masahiro@socionext.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , On Fri, 15 Jun 2018 10:18:50 +0900, Masahiro Yamada wrote: > According to the Denali User's Guide, this IP needs three clocks: >=20 > - clk: controller core clock >=20 > - clk_x: bus interface clock >=20 > - ecc_clk: clock at which ECC circuitry is run >=20 > Currently, denali_dt.c requires a single anonymous clock and its > frequency. However, the driver needs to get the frequency of "clk_x" > not "clk". This is confusing because people tend to assume the > anonymous clock means the core clock. In fact, I got a report of > SOCFPGA breakage because the timing parameters are calculated based > on a wrong frequency. >=20 > Instead of the cheesy implementation, the clocks in the real hardware > should be represented in the driver and the DT-binding. >=20 > However, adding new clocks would break the existing platforms. For the > backward compatibility, the driver still accepts a single clock just as > before. If clk_x is missing, clk_x_rate is set to a hardcoded value. > This is fine for existing DT of Socionext UniPhier, and also fixes the > issue of Altera (Intel) SOCFPGA because both platforms use 200 MHz for > the bus interface clock. >=20 > Fixes: 1bb88666775e ("mtd: nand: denali: handle timing parameters by setu= p_data_interface()") > Cc: linux-stable #4.14+ > Reported-by: Richard Weinberger > Signed-off-by: Masahiro Yamada > --- >=20 Reviewed-by: Miquel Raynal Thanks, Miqu=C3=A8l