From: Boris Brezillon <boris.brezillon@bootlin.com>
To: "Bean Huo (beanhuo)" <beanhuo@micron.com>
Cc: Chris Packham <chris.packham@alliedtelesis.co.nz>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-mtd@lists.infradead.org" <linux-mtd@lists.infradead.org>,
"miquel.raynal@bootlin.com" <miquel.raynal@bootlin.com>,
"computersforpeace@gmail.com" <computersforpeace@gmail.com>,
"dwmw2@infradead.org" <dwmw2@infradead.org>
Subject: Re: [PATCH v6 0/6] mtd: rawnand: support MT29F1G08ABAFAWP-ITE:F
Date: Tue, 10 Jul 2018 14:17:15 +0200 [thread overview]
Message-ID: <20180710141715.375ac6df@bbrezillon> (raw)
In-Reply-To: <60a09008ea18424eb4005839554da858@SIWEX5A.sing.micron.com>
On Tue, 10 Jul 2018 11:40:08 +0000
"Bean Huo (beanhuo)" <beanhuo@micron.com> wrote:
> Hi, Boris
> >>
> >> Okay, I think we already had this discussion, but I'm asking it again.
> >> What are the possible values for that field and what do they mean?
> >
> >Still, it's not clear to me what "Internal ECC level" means. It seems that NAND
> >chips having on-die ECC have this field set to 10b (0x2), 00b seems to be
> >reserved for "no on-die ECC", but what are 01b and 11b reserved for?
> >
>
> That position identifies the part as having Internal ECC capability.
> The 01b and 11b are reserved for future definition. Bit 7 of READ ID Byte 4 identifies the
> device as an ECC OFF 0x0 or ECC ON 0x1.
>
> >> Also, is it even used to encode the fact that the NAND has on-die ECC
> >> on all your NANDs? We already had the problem of incompatible ID
> >> schemes, so I wouldn't be surprised if that was the case here, hence
> >> my initial suggestion to base the detection on the model name.
> >
> >I'd really need to have an answer on that one to take a decision. Also, I
> >couldn't find a datasheet for an IT (without E) version of the
> >MT29F1G08ABAFAWP part. Does it exist, or can we assume
> >MT29F1G08ABAFAWP chips always come with forcibly enabled on-die ECC?
>
> MT29F1G08ABAFAWP comes in ECC ON only. We didn’t develop a
> MT29F1G08ABAFAWP ECC OFF version. Bit 7 of READ ID Byte 4 identifies the
> device as an ECC OFF 0x0 or ECC ON 0x1.
>
Okay. Can you have a look at the patches I sent an let me know if I do
the right thing?
next parent reply other threads:[~2018-07-10 12:17 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <60a09008ea18424eb4005839554da858@SIWEX5A.sing.micron.com>
2018-07-10 12:17 ` Boris Brezillon [this message]
[not found] <1df9a5d95c44408ab42b34948f956351@SIWEX5A.sing.micron.com>
2018-07-10 12:44 ` [PATCH v6 0/6] mtd: rawnand: support MT29F1G08ABAFAWP-ITE:F Miquel Raynal
[not found] <c27f10f9efc14fed817c1a343d8b67d4@SIWEX5A.sing.micron.com>
2018-07-09 16:31 ` Boris Brezillon
2018-07-09 18:41 ` Boris Brezillon
2018-06-24 22:44 Chris Packham
2018-06-25 12:32 ` Miquel Raynal
2018-07-06 19:27 ` Boris Brezillon
2018-07-06 21:37 ` Boris Brezillon
2018-07-08 23:56 ` Chris Packham
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