From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Cc: Boris Brezillon <boris.brezillon@bootlin.com>,
Richard Weinberger <richard@nod.at>,
linux-mtd@lists.infradead.org,
Marek Vasut <marek.vasut@gmail.com>,
David Woodhouse <dwmw2@infradead.org>,
Brian Norris <computersforpeace@gmail.com>,
Ofer Heifetz <oferh@marvell.com>
Subject: Re: [PATCH v2] mtd: nand: use regmap_update_bits() in marvell_nand for syscon access
Date: Tue, 4 Sep 2018 23:51:59 +0200 [thread overview]
Message-ID: <20180904235159.6b1361df@xps13> (raw)
In-Reply-To: <20180802085625.29635-1-thomas.petazzoni@bootlin.com>
Hi Thomas,
Thomas Petazzoni <thomas.petazzoni@bootlin.com> wrote on Thu, 2 Aug
2018 10:56:25 +0200:
> The marvell_nfc_init() function fiddles with some bits of a system
> controller on Armada 7K/8K. However, it does a read/modify/write
> sequence on GENCONF_CLK_GATING_CTRL and GENCONF_ND_CLK_CTRL, which
> isn't safe from a concurrency point of view, as the regmap lock isn't
> taken accross the read/modify/write sequence. To solve this issue, use
> regmap_update_bits().
>
> While at it, since the "reg" variable is no longer needed for the
> read/modify/write sequences, get rid of it for the regmap_write() to
> GENCONF_SOC_DEVICE_MUX, and directly pass the value to be written as
> argument.
>
> Fixes: 02f26ecf8c772 ("mtd: nand: add reworked Marvell NAND controller driver")
> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
> ---
Applied to nand/next with the subject prefix changed to
"mtd: rawnand: marvell:"
Thanks,
Miquèl
prev parent reply other threads:[~2018-09-04 21:52 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-08-02 8:56 [PATCH v2] mtd: nand: use regmap_update_bits() in marvell_nand for syscon access Thomas Petazzoni
2018-09-04 21:51 ` Miquel Raynal [this message]
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