From: Boris Brezillon <boris.brezillon@bootlin.com>
To: "Grandbois, Brett" <brett.grandbois@opengear.com>
Cc: Richard Weinberger <richard@nod.at>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
Marek Vasut <marek.vasut@gmail.com>,
"linux-mtd@lists.infradead.org" <linux-mtd@lists.infradead.org>,
Brian Norris <computersforpeace@gmail.com>,
David Woodhouse <dwmw2@infradead.org>
Subject: Re: [PATCH v2] mtd: spi-nor: Add support for SPI boot flash access for AMD Family 16h
Date: Wed, 31 Oct 2018 14:17:42 +0100 [thread overview]
Message-ID: <20181031141742.4fd2d33b@bbrezillon> (raw)
In-Reply-To: <1912426d-8189-0508-d152-8dfcf6192162@opengear.com>
On Wed, 31 Oct 2018 03:18:28 +0000
"Grandbois, Brett" <brett.grandbois@opengear.com> wrote:
> On 30/10/18 6:26 pm, Boris Brezillon wrote:
> > On Mon, 29 Oct 2018 23:15:42 +0000
> > "Grandbois, Brett"<brett.grandbois@opengear.com> wrote:
> >
> >> On 28/10/18 1:39 am, Boris Brezillon wrote:
> >>> Hi Brett,
> >>>
> >>> On Tue, 16 Oct 2018 00:57:41 +0000
> >>> "Grandbois, Brett"<brett.grandbois@opengear.com> wrote:
> >>>
> >>>> Add support to expose the SPI boot flash on AMD Family 16h CPUs
> >>>> as a standard mtd device to give userspace BIOS updaters greater
> >>>> feature support. The BIOS and Kernel Developer's Guide refers to
> >>>> this as the 'SPI ROM' controller and so the driver follows that
> >>>> naming convention for consistency.
> >>>>
> >>> We're currently trying to convert spi-nor controller drivers to
> >>> the spi-mem interface [1]. Can you look at this new interface and
> >>> tell me if you'd be able to implement it? If that's not possible,
> >>> then I'd prefer to have this driver implement the mtd_info
> >>> interface directly.
> >> So from going over the spi-mem interface it looks like the intent
> >> is for these sorts of devices to be a standard spi_controller with
> >> only mem_ops defined and the transfer/_one/_one_message left as
> >> NULL? Is that correct?
> > Yes
> >
> >> That's a bit of a pivot from how it's currently done
> >> (it's conceptually similar to the intel-spi-pci driver so I was
> >> following that)
> > Yes, and that's exactly what I'd like to avoid. intel-spi-pci will
> > probably be the trickiest conversion, so I'd like to avoid having
> > another one ;-).
> >
> >> but I should be able to rework it to the new
> >> interface. This then lives under drivers/spi and thus should be
> >> submitted to linux-spi?
> > Actually, if the controller is only ever connected to the same SPI
> > NOR chip (no need for advanced detection scheme) and does not
> > support support Octo/Quad/Dual modes (or any other advanced
> > features), you'll be better off implementing
> > mtd->_read/_write/_erase() directly (the driver would then live in
> > drivers/mtd/devices/).
>
> Hmm, conceptually the device is better suited to the mtd layer than
> the spi layer. The HW is designed to only ever access spi flash
> chips, not as a general spi master controller, so really the end
> result of it should always only ever be 1 mtd device. Unfortunately
> as the device probing and command sequences for this are the same as
> implemented in spi-nor I'd either be duplicating a lot of existing
> code, or just wrapping around spi_nor_scan which sounds like we're
> back to the dedicated spi-nor controller you're trying to move away
> from.
>
> The spi-mem interface ops do nicely match up with what the controller
> supports, including the new direct mapping mode which I'd be able to
> make use of, so as long as there aren't any issues with supporting
> only mem_ops and not the message transfers
That's allowed.
> then it's probably the way to go.
Sounds good then.
prev parent reply other threads:[~2018-10-31 13:17 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-10-16 0:57 [PATCH v2] mtd: spi-nor: Add support for SPI boot flash access for AMD Family 16h Grandbois, Brett
2018-10-27 15:39 ` Boris Brezillon
2018-10-29 23:15 ` Grandbois, Brett
2018-10-30 8:26 ` Boris Brezillon
2018-10-31 3:18 ` Grandbois, Brett
2018-10-31 13:17 ` Boris Brezillon [this message]
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