FW: SPI-NOR FS512S incorrect CR3NV[1] value

FW: SPI-NOR FS512S incorrect CR3NV[1] value

[Yogesh Narayan Gaur]

+ Linux MTD mailing list group

Hi Tudor,

As confirmed by cypress team, default value of CR3NV[1] is 0 for flash FS512S and this is having the 256KB uniform erase sector option.
There is discrepancy between FS512s datasheet and the actual shipped chip.

--
Regards
Yogesh Gaur


From: Yong Qin [mailto:Yong.Qin@cypress.com] 
Sent: Saturday, December 1, 2018 2:06 AM
To: Yogesh Narayan Gaur <yogeshnarayan.gaur@nxp.com>; James Tomasetta <James.Tomasetta@cypress.com>;
[…]

Hi Yogesh,

Our product team confirmed that what you observed is expected and correct. FS512S has CR3NV[1] bit default as 0. Because FS512S only has 256KB uniform sector option. This bit is reserved and don’t care. There is discrepancy between FS512S datasheet and real product. We will update the datasheet.


Thanks and have a good weekend!
Yong 

Re: SPI-NOR FS512S incorrect CR3NV[1] value

[Boris Brezillon]

On Mon, 3 Dec 2018 04:33:53 +0000
Yogesh Narayan Gaur <yogeshnarayan.gaur@nxp.com> wrote:

> + Linux MTD mailing list group
> 
> Hi Tudor,
> 
> As confirmed by cypress team, default value of CR3NV[1] is 0 for flash FS512S and this is having the 256KB uniform erase sector option.
> There is discrepancy between FS512s datasheet and the actual shipped chip.

It's not only the datasheet that is wrong, the BFPT section is wrong
too, and this one can't be fixed :-/.

RE: SPI-NOR FS512S incorrect CR3NV[1] value

[Yong Qin]

Hi Boris,

Do you mean the SFDP table? Can you please share me more detail of what is wrong, i.e., which parameter, what is expect value and what you get?

Thanks,
Yong

-----Original Message-----
From: Boris Brezillon <boris.brezillon@bootlin.com>
Sent: Monday, December 3, 2018 2:38 AM
To: Yogesh Narayan Gaur <yogeshnarayan.gaur@nxp.com>
Cc: Tudor Ambarus <tudor.ambarus@microchip.com>; cyrille.pitchen@wedev4u.fr; Yong Qin <Yong.Qin@cypress.com>; James Tomasetta <James.Tomasetta@cypress.com>; Jimmy Zhao <jimmy.zhao@nxp.com>; linux-mtd@lists.infradead.org
Subject: Re: SPI-NOR FS512S incorrect CR3NV[1] value

On Mon, 3 Dec 2018 04:33:53 +0000
Yogesh Narayan Gaur <yogeshnarayan.gaur@nxp.com> wrote:

> + Linux MTD mailing list group
>
> Hi Tudor,
>
> As confirmed by cypress team, default value of CR3NV[1] is 0 for flash FS512S and this is having the 256KB uniform erase sector option.
> There is discrepancy between FS512s datasheet and the actual shipped chip.

It's not only the datasheet that is wrong, the BFPT section is wrong too, and this one can't be fixed :-/.

This message and any attachments may contain confidential information from Cypress or its subsidiaries. If it has been received in error, please advise the sender and immediately delete this message.

Re: SPI-NOR FS512S incorrect CR3NV[1] value

[Boris Brezillon]

Hi Yong,

On Tue, 4 Dec 2018 01:37:14 +0000
Yong Qin <Yong.Qin@cypress.com> wrote:

> Hi Boris,
> 
> Do you mean the SFDP table?

Sorry, I meant the SMPT (Sector Map Parameter Table) section of
the SFDP table. See page 130 of this datasheet [1].

> Can you please share me more detail of what is wrong, i.e., which
> parameter, what is expect value and what you get?

See "Table 70. Sector Map Parameter", CR3NV[1] is always set to one,
and when we retrieve this value at runtime we get a 0. Which means
we won't find a matching mapid when iterating over the map table, hence
the bug reported by Yogesh.

If CR3NV[1] is always 0, then the SMPT should be fixed accordingly:

CR3NV[3]  CR1NV[2]  CR3NV[1]  Index  Value Description
0         0         0         00h    4 kB sectors at bottom with remainder 256 kB sectors
0         1         0         02h    4 kB sectors at top with remainder 256 kB sectors
1         0         0         04h    Uniform 256 kB sectors

Regards,

Boris

[1]http://www.cypress.com/file/216376/download

RE: SPI-NOR FS512S incorrect CR3NV[1] value

[Yong Qin]

Hi Boris,

Thanks for pointing this out.

Confirmed with our product team, this is the part of datasheet discrepancy. Since FS512S only has 256KB sector size option, CR3NV[1] is don't care in FS512S and default value is set as 0 in factory.

Column 3 (CR3NV[1]) of table 70 in datasheet will be removed.

For software implementation, if identified the device is FS512S, then checking the combination of CR3NV[3]  & CR1NV[2] is sufficient to decide if the device has top/bottom 4KB sectors, or uniform 256KB sectors.

Thanks,
Yong

-----Original Message-----
From: Boris Brezillon <boris.brezillon@bootlin.com>
Sent: Tuesday, December 4, 2018 4:04 AM
To: Yong Qin <Yong.Qin@cypress.com>
Cc: Yogesh Narayan Gaur <yogeshnarayan.gaur@nxp.com>; Tudor Ambarus <tudor.ambarus@microchip.com>; cyrille.pitchen@wedev4u.fr; James Tomasetta <James.Tomasetta@cypress.com>; Jimmy Zhao <jimmy.zhao@nxp.com>; linux-mtd@lists.infradead.org
Subject: Re: SPI-NOR FS512S incorrect CR3NV[1] value

Hi Yong,

On Tue, 4 Dec 2018 01:37:14 +0000
Yong Qin <Yong.Qin@cypress.com> wrote:

> Hi Boris,
>
> Do you mean the SFDP table?

Sorry, I meant the SMPT (Sector Map Parameter Table) section of the SFDP table. See page 130 of this datasheet [1].

> Can you please share me more detail of what is wrong, i.e., which
> parameter, what is expect value and what you get?

See "Table 70. Sector Map Parameter", CR3NV[1] is always set to one, and when we retrieve this value at runtime we get a 0. Which means we won't find a matching mapid when iterating over the map table, hence the bug reported by Yogesh.

If CR3NV[1] is always 0, then the SMPT should be fixed accordingly:

CR3NV[3]  CR1NV[2]  CR3NV[1]  Index  Value Description
0         0         0         00h    4 kB sectors at bottom with remainder 256 kB sectors
0         1         0         02h    4 kB sectors at top with remainder 256 kB sectors
1         0         0         04h    Uniform 256 kB sectors

Regards,

Boris

[1]http://www.cypress.com/file/216376/download

This message and any attachments may contain confidential information from Cypress or its subsidiaries. If it has been received in error, please advise the sender and immediately delete this message.

Re: SPI-NOR FS512S incorrect CR3NV[1] value

[Boris Brezillon]

On Wed, 5 Dec 2018 19:21:51 +0000
Yong Qin <Yong.Qin@cypress.com> wrote:

> Hi Boris,
> 
> Thanks for pointing this out.
> 
> Confirmed with our product team, this is the part of datasheet
> discrepancy. Since FS512S only has 256KB sector size option, CR3NV[1]
> is don't care in FS512S and default value is set as 0 in factory.
> 
> Column 3 (CR3NV[1]) of table 70 in datasheet will be removed.
> 
> For software implementation, if identified the device is FS512S, then
> checking the combination of CR3NV[3]  & CR1NV[2] is sufficient to
> decide if the device has top/bottom 4KB sectors, or uniform 256KB
> sectors.

Again, fixing the datasheet is not enough, the SMPT section on the flash
needs to be fixed too.

Re: SPI-NOR FS512S incorrect CR3NV[1] value

[Boris Brezillon]

On Wed, 5 Dec 2018 20:27:53 +0100
Boris Brezillon <boris.brezillon@bootlin.com> wrote:

> On Wed, 5 Dec 2018 19:21:51 +0000
> Yong Qin <Yong.Qin@cypress.com> wrote:
> 
> > Hi Boris,
> > 
> > Thanks for pointing this out.
> > 
> > Confirmed with our product team, this is the part of datasheet
> > discrepancy. Since FS512S only has 256KB sector size option, CR3NV[1]
> > is don't care in FS512S and default value is set as 0 in factory.
> > 
> > Column 3 (CR3NV[1]) of table 70 in datasheet will be removed.
> > 
> > For software implementation, if identified the device is FS512S, then
> > checking the combination of CR3NV[3]  & CR1NV[2] is sufficient to
> > decide if the device has top/bottom 4KB sectors, or uniform 256KB
> > sectors.  
> 
> Again, fixing the datasheet is not enough, the SMPT section on the flash
> needs to be fixed too.

To be honest, it's already too late for this part, but please try to
avoid this sort of mistakes on your future chips.

RE: SPI-NOR FS512S incorrect CR3NV[1] value

[Yong Qin]

Thanks Boris for your understanding.

FS512S has been in production for many years. It is very difficult to change the chip now. Any changes to the chip may also have impact on the customers who have been using this device for production.

Cypress continues improving its products and documents quality. We will try to avoid this kind of mistakes in the future.

Thanks,
Yong

-----Original Message-----
From: Boris Brezillon <boris.brezillon@bootlin.com>
Sent: Wednesday, December 5, 2018 2:30 PM
To: Yong Qin <Yong.Qin@cypress.com>
Cc: Yogesh Narayan Gaur <yogeshnarayan.gaur@nxp.com>; Tudor Ambarus <tudor.ambarus@microchip.com>; cyrille.pitchen@wedev4u.fr; James Tomasetta <James.Tomasetta@cypress.com>; Jimmy Zhao <jimmy.zhao@nxp.com>; linux-mtd@lists.infradead.org
Subject: Re: SPI-NOR FS512S incorrect CR3NV[1] value

On Wed, 5 Dec 2018 20:27:53 +0100
Boris Brezillon <boris.brezillon@bootlin.com> wrote:

> On Wed, 5 Dec 2018 19:21:51 +0000
> Yong Qin <Yong.Qin@cypress.com> wrote:
>
> > Hi Boris,
> >
> > Thanks for pointing this out.
> >
> > Confirmed with our product team, this is the part of datasheet
> > discrepancy. Since FS512S only has 256KB sector size option,
> > CR3NV[1] is don't care in FS512S and default value is set as 0 in factory.
> >
> > Column 3 (CR3NV[1]) of table 70 in datasheet will be removed.
> >
> > For software implementation, if identified the device is FS512S,
> > then checking the combination of CR3NV[3]  & CR1NV[2] is sufficient
> > to decide if the device has top/bottom 4KB sectors, or uniform 256KB
> > sectors.
>
> Again, fixing the datasheet is not enough, the SMPT section on the
> flash needs to be fixed too.

To be honest, it's already too late for this part, but please try to avoid this sort of mistakes on your future chips.

This message and any attachments may contain confidential information from Cypress or its subsidiaries. If it has been received in error, please advise the sender and immediately delete this message.

RE: SPI-NOR FS512S incorrect CR3NV[1] value

[James Tomasetta]

Boris,

Is there an issue with updating the software?  Is the issue that there is a ROM bootloader checking this?  Is this for the LX2 or the old LS family?

James

-----Original Message-----
From: Boris Brezillon <boris.brezillon@bootlin.com>
Sent: Wednesday, December 5, 2018 1:28 PM
To: Yong Qin <Yong.Qin@cypress.com>
Cc: Yogesh Narayan Gaur <yogeshnarayan.gaur@nxp.com>; Tudor Ambarus <tudor.ambarus@microchip.com>; cyrille.pitchen@wedev4u.fr; James Tomasetta <James.Tomasetta@cypress.com>; Jimmy Zhao <jimmy.zhao@nxp.com>; linux-mtd@lists.infradead.org
Subject: Re: SPI-NOR FS512S incorrect CR3NV[1] value

On Wed, 5 Dec 2018 19:21:51 +0000
Yong Qin <Yong.Qin@cypress.com> wrote:

> Hi Boris,
>
> Thanks for pointing this out.
>
> Confirmed with our product team, this is the part of datasheet
> discrepancy. Since FS512S only has 256KB sector size option, CR3NV[1]
> is don't care in FS512S and default value is set as 0 in factory.
>
> Column 3 (CR3NV[1]) of table 70 in datasheet will be removed.
>
> For software implementation, if identified the device is FS512S, then
> checking the combination of CR3NV[3]  & CR1NV[2] is sufficient to
> decide if the device has top/bottom 4KB sectors, or uniform 256KB
> sectors.

Again, fixing the datasheet is not enough, the SMPT section on the flash needs to be fixed too.

This message and any attachments may contain confidential information from Cypress or its subsidiaries. If it has been received in error, please advise the sender and immediately delete this message.

RE: SPI-NOR FS512S incorrect CR3NV[1] value

[Yogesh Narayan Gaur]

Hi James,

This issue has been caught when we are updating the Linux OS from older kernel version to newer version.
In older version, there wasn't logic to check SFDP and SMPT param and hence this issue was never been caught.

But with newer Linux kernel OS version, we have hit this issue.

Also, presently in u-boot bootloader there is no check for SFDP and SMPT param for this flash and hence not been caught there.

But, we have hit this same issue when trying to update UEFI bootloader. New UEFI bootloader is parsing SFDP param and SMPT table.

IMO, as this issue is SPI-NOR flash issue, thus this would be independent of the target. We have observed this on older LS family target(LS1046ARDB) as well as on LX2 on which this flash is connected.

--
Regards
Yogesh Gaur

> -----Original Message-----
> From: James Tomasetta [mailto:James.Tomasetta@cypress.com]
> Sent: Thursday, December 6, 2018 10:00 PM
> To: Boris Brezillon <boris.brezillon@bootlin.com>; Yong Qin
> <Yong.Qin@cypress.com>
> Cc: Yogesh Narayan Gaur <yogeshnarayan.gaur@nxp.com>; Tudor Ambarus
> <tudor.ambarus@microchip.com>; cyrille.pitchen@wedev4u.fr; Jimmy Zhao
> <jimmy.zhao@nxp.com>; linux-mtd@lists.infradead.org
> Subject: RE: SPI-NOR FS512S incorrect CR3NV[1] value
> 
> Boris,
> 
> Is there an issue with updating the software?  Is the issue that there is a ROM
> bootloader checking this?  Is this for the LX2 or the old LS family?
> 
> James
> 
> -----Original Message-----
> From: Boris Brezillon <boris.brezillon@bootlin.com>
> Sent: Wednesday, December 5, 2018 1:28 PM
> To: Yong Qin <Yong.Qin@cypress.com>
> Cc: Yogesh Narayan Gaur <yogeshnarayan.gaur@nxp.com>; Tudor Ambarus
> <tudor.ambarus@microchip.com>; cyrille.pitchen@wedev4u.fr; James
> Tomasetta <James.Tomasetta@cypress.com>; Jimmy Zhao
> <jimmy.zhao@nxp.com>; linux-mtd@lists.infradead.org
> Subject: Re: SPI-NOR FS512S incorrect CR3NV[1] value
> 
> On Wed, 5 Dec 2018 19:21:51 +0000
> Yong Qin <Yong.Qin@cypress.com> wrote:
> 
> > Hi Boris,
> >
> > Thanks for pointing this out.
> >
> > Confirmed with our product team, this is the part of datasheet
> > discrepancy. Since FS512S only has 256KB sector size option, CR3NV[1]
> > is don't care in FS512S and default value is set as 0 in factory.
> >
> > Column 3 (CR3NV[1]) of table 70 in datasheet will be removed.
> >
> > For software implementation, if identified the device is FS512S, then
> > checking the combination of CR3NV[3]  & CR1NV[2] is sufficient to
> > decide if the device has top/bottom 4KB sectors, or uniform 256KB
> > sectors.
> 
> Again, fixing the datasheet is not enough, the SMPT section on the flash needs
> to be fixed too.
> 
> This message and any attachments may contain confidential information from
> Cypress or its subsidiaries. If it has been received in error, please advise the
> sender and immediately delete this message.

RE: SPI-NOR FS512S incorrect CR3NV[1] value

[James Tomasetta]

[-- Attachment #1: Type: text/plain, Size: 3805 bytes --]

Yogesh,

Attached is the latest CY driver for linux which might help.  It does not use the SFDP.  We are working to see if we can update the default value of the device to 1.

James

-----Original Message-----
From: Yogesh Narayan Gaur <yogeshnarayan.gaur@nxp.com>
Sent: Thursday, December 6, 2018 10:37 PM
To: James Tomasetta <James.Tomasetta@cypress.com>; Boris Brezillon <boris.brezillon@bootlin.com>; Yong Qin <Yong.Qin@cypress.com>
Cc: Tudor Ambarus <tudor.ambarus@microchip.com>; cyrille.pitchen@wedev4u.fr; Jimmy Zhao <jimmy.zhao@nxp.com>; linux-mtd@lists.infradead.org; Pankaj Bansal <pankaj.bansal@nxp.com>
Subject: RE: SPI-NOR FS512S incorrect CR3NV[1] value

Hi James,

This issue has been caught when we are updating the Linux OS from older kernel version to newer version.
In older version, there wasn't logic to check SFDP and SMPT param and hence this issue was never been caught.

But with newer Linux kernel OS version, we have hit this issue.

Also, presently in u-boot bootloader there is no check for SFDP and SMPT param for this flash and hence not been caught there.

But, we have hit this same issue when trying to update UEFI bootloader. New UEFI bootloader is parsing SFDP param and SMPT table.

IMO, as this issue is SPI-NOR flash issue, thus this would be independent of the target. We have observed this on older LS family target(LS1046ARDB) as well as on LX2 on which this flash is connected.

--
Regards
Yogesh Gaur

> -----Original Message-----
> From: James Tomasetta [mailto:James.Tomasetta@cypress.com]
> Sent: Thursday, December 6, 2018 10:00 PM
> To: Boris Brezillon <boris.brezillon@bootlin.com>; Yong Qin
> <Yong.Qin@cypress.com>
> Cc: Yogesh Narayan Gaur <yogeshnarayan.gaur@nxp.com>; Tudor Ambarus
> <tudor.ambarus@microchip.com>; cyrille.pitchen@wedev4u.fr; Jimmy Zhao
> <jimmy.zhao@nxp.com>; linux-mtd@lists.infradead.org
> Subject: RE: SPI-NOR FS512S incorrect CR3NV[1] value
>
> Boris,
>
> Is there an issue with updating the software?  Is the issue that there
> is a ROM bootloader checking this?  Is this for the LX2 or the old LS family?
>
> James
>
> -----Original Message-----
> From: Boris Brezillon <boris.brezillon@bootlin.com>
> Sent: Wednesday, December 5, 2018 1:28 PM
> To: Yong Qin <Yong.Qin@cypress.com>
> Cc: Yogesh Narayan Gaur <yogeshnarayan.gaur@nxp.com>; Tudor Ambarus
> <tudor.ambarus@microchip.com>; cyrille.pitchen@wedev4u.fr; James
> Tomasetta <James.Tomasetta@cypress.com>; Jimmy Zhao
> <jimmy.zhao@nxp.com>; linux-mtd@lists.infradead.org
> Subject: Re: SPI-NOR FS512S incorrect CR3NV[1] value
>
> On Wed, 5 Dec 2018 19:21:51 +0000
> Yong Qin <Yong.Qin@cypress.com> wrote:
>
> > Hi Boris,
> >
> > Thanks for pointing this out.
> >
> > Confirmed with our product team, this is the part of datasheet
> > discrepancy. Since FS512S only has 256KB sector size option,
> > CR3NV[1] is don't care in FS512S and default value is set as 0 in factory.
> >
> > Column 3 (CR3NV[1]) of table 70 in datasheet will be removed.
> >
> > For software implementation, if identified the device is FS512S,
> > then checking the combination of CR3NV[3]  & CR1NV[2] is sufficient
> > to decide if the device has top/bottom 4KB sectors, or uniform 256KB
> > sectors.
>
> Again, fixing the datasheet is not enough, the SMPT section on the
> flash needs to be fixed too.
>
> This message and any attachments may contain confidential information
> from Cypress or its subsidiaries. If it has been received in error,
> please advise the sender and immediately delete this message.

This message and any attachments may contain confidential information from Cypress or its subsidiaries. If it has been received in error, please advise the sender and immediately delete this message.

[-- Attachment #2: linux-4.14.0-cy-snor-v18.4.zip --]
[-- Type: application/x-zip-compressed, Size: 24353 bytes --]

Re: SPI-NOR FS512S incorrect CR3NV[1] value

[Boris Brezillon]

On Fri, 7 Dec 2018 15:02:09 +0000
James Tomasetta <James.Tomasetta@cypress.com> wrote:

> Yogesh,
> 
> Attached is the latest CY driver for linux which might help.  It does
> not use the SFDP.

Yes, and that's exactly what we are trying to address. SFDP was
designed to provide a generic way to expose various information (memory
organization, supported cmdset/features, ...). If manufacturers don't
take care when populating these tables, we're back to the current
situation where everything has to be described on a per-chip basis (far
from ideal).

> We are working to see if we can update the default
> value of the device to 1.

I think it's too late for this part (we'll find a way to fixup the SMPT
table at runtime). But please be careful next time you design a chip.

RE: SPI-NOR FS512S incorrect CR3NV[1] value

[Pankaj Bansal]

Hi James,

> -----Original Message-----
> From: Boris Brezillon [mailto:boris.brezillon@bootlin.com]
> Sent: Friday, December 7, 2018 8:47 PM
> To: James Tomasetta <James.Tomasetta@cypress.com>
> Cc: Yogesh Narayan Gaur <yogeshnarayan.gaur@nxp.com>; Yong Qin
> <Yong.Qin@cypress.com>; Tudor Ambarus <tudor.ambarus@microchip.com>;
> cyrille.pitchen@wedev4u.fr; Jimmy Zhao <jimmy.zhao@nxp.com>; linux-
> mtd@lists.infradead.org; Pankaj Bansal <pankaj.bansal@nxp.com>
> Subject: Re: SPI-NOR FS512S incorrect CR3NV[1] value
> 
> On Fri, 7 Dec 2018 15:02:09 +0000
> James Tomasetta <James.Tomasetta@cypress.com> wrote:
> 
> > Yogesh,
> >
> > Attached is the latest CY driver for linux which might help.  It does
> > not use the SFDP.
> 
> Yes, and that's exactly what we are trying to address. SFDP was designed to
> provide a generic way to expose various information (memory organization,
> supported cmdset/features, ...). If manufacturers don't take care when
> populating these tables, we're back to the current situation where everything
> has to be described on a per-chip basis (far from ideal).
> 
> > We are working to see if we can update the default value of the device
> > to 1.

Did you find a way to make the default value of Nonvolatile registers same as SFDP header?
We need it for UEFI boot loader.

> 
> I think it's too late for this part (we'll find a way to fixup the SMPT table at
> runtime). But please be careful next time you design a chip.