From: Boris Brezillon <boris.brezillon@bootlin.com>
To: Yong Qin <Yong.Qin@cypress.com>
Cc: Yogesh Narayan Gaur <yogeshnarayan.gaur@nxp.com>,
Tudor Ambarus <tudor.ambarus@microchip.com>,
"cyrille.pitchen@wedev4u.fr" <cyrille.pitchen@wedev4u.fr>,
James Tomasetta <James.Tomasetta@cypress.com>,
Jimmy Zhao <jimmy.zhao@nxp.com>,
"linux-mtd@lists.infradead.org" <linux-mtd@lists.infradead.org>
Subject: Re: SPI-NOR FS512S incorrect CR3NV[1] value
Date: Wed, 5 Dec 2018 20:29:40 +0100 [thread overview]
Message-ID: <20181205202940.0ba2f25d@bbrezillon> (raw)
In-Reply-To: <20181205202753.47ebe911@bbrezillon>
On Wed, 5 Dec 2018 20:27:53 +0100
Boris Brezillon <boris.brezillon@bootlin.com> wrote:
> On Wed, 5 Dec 2018 19:21:51 +0000
> Yong Qin <Yong.Qin@cypress.com> wrote:
>
> > Hi Boris,
> >
> > Thanks for pointing this out.
> >
> > Confirmed with our product team, this is the part of datasheet
> > discrepancy. Since FS512S only has 256KB sector size option, CR3NV[1]
> > is don't care in FS512S and default value is set as 0 in factory.
> >
> > Column 3 (CR3NV[1]) of table 70 in datasheet will be removed.
> >
> > For software implementation, if identified the device is FS512S, then
> > checking the combination of CR3NV[3] & CR1NV[2] is sufficient to
> > decide if the device has top/bottom 4KB sectors, or uniform 256KB
> > sectors.
>
> Again, fixing the datasheet is not enough, the SMPT section on the flash
> needs to be fixed too.
To be honest, it's already too late for this part, but please try to
avoid this sort of mistakes on your future chips.
next prev parent reply other threads:[~2018-12-05 19:30 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-12-03 4:33 FW: SPI-NOR FS512S incorrect CR3NV[1] value Yogesh Narayan Gaur
2018-12-03 7:38 ` Boris Brezillon
2018-12-04 1:37 ` Yong Qin
2018-12-04 9:03 ` Boris Brezillon
2018-12-05 19:21 ` Yong Qin
2018-12-05 19:27 ` Boris Brezillon
2018-12-05 19:29 ` Boris Brezillon [this message]
2018-12-05 19:39 ` Yong Qin
2018-12-06 16:30 ` James Tomasetta
2018-12-07 4:37 ` Yogesh Narayan Gaur
2018-12-07 15:02 ` James Tomasetta
2018-12-07 15:17 ` Boris Brezillon
2018-12-17 6:22 ` Pankaj Bansal
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20181205202940.0ba2f25d@bbrezillon \
--to=boris.brezillon@bootlin.com \
--cc=James.Tomasetta@cypress.com \
--cc=Yong.Qin@cypress.com \
--cc=cyrille.pitchen@wedev4u.fr \
--cc=jimmy.zhao@nxp.com \
--cc=linux-mtd@lists.infradead.org \
--cc=tudor.ambarus@microchip.com \
--cc=yogeshnarayan.gaur@nxp.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).