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Date: Wed, 5 Dec 2018 20:29:40 +0100
From: Boris Brezillon <boris.brezillon@bootlin.com>
To: Yong Qin <Yong.Qin@cypress.com>
Cc: Yogesh Narayan Gaur <yogeshnarayan.gaur@nxp.com>, Tudor Ambarus
 <tudor.ambarus@microchip.com>, "cyrille.pitchen@wedev4u.fr"
 <cyrille.pitchen@wedev4u.fr>, James Tomasetta
 <James.Tomasetta@cypress.com>, Jimmy Zhao <jimmy.zhao@nxp.com>,
 "linux-mtd@lists.infradead.org" <linux-mtd@lists.infradead.org>
Subject: Re: SPI-NOR FS512S incorrect CR3NV[1] value
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On Wed, 5 Dec 2018 20:27:53 +0100
Boris Brezillon <boris.brezillon@bootlin.com> wrote:

> On Wed, 5 Dec 2018 19:21:51 +0000
> Yong Qin <Yong.Qin@cypress.com> wrote:
> 
> > Hi Boris,
> > 
> > Thanks for pointing this out.
> > 
> > Confirmed with our product team, this is the part of datasheet
> > discrepancy. Since FS512S only has 256KB sector size option, CR3NV[1]
> > is don't care in FS512S and default value is set as 0 in factory.
> > 
> > Column 3 (CR3NV[1]) of table 70 in datasheet will be removed.
> > 
> > For software implementation, if identified the device is FS512S, then
> > checking the combination of CR3NV[3]  & CR1NV[2] is sufficient to
> > decide if the device has top/bottom 4KB sectors, or uniform 256KB
> > sectors.  
> 
> Again, fixing the datasheet is not enough, the SMPT section on the flash
> needs to be fixed too.

To be honest, it's already too late for this part, but please try to
avoid this sort of mistakes on your future chips.