From: Miquel Raynal <miquel.raynal@bootlin.com>
To: "Bean Huo (beanhuo)" <beanhuo@micron.com>
Cc: Boris Brezillon <boris.brezillon@bootlin.com>,
Thomas Gleixner <tglx@linutronix.de>,
"linux-mtd@lists.infradead.org" <linux-mtd@lists.infradead.org>,
Richard Weinberger <richard@nod.at>
Subject: Re: [EXT] Re: [PATCH RFC] mtd: rawnand: Cure MICRON NAND partial erase issue
Date: Mon, 10 Dec 2018 16:40:16 +0100 [thread overview]
Message-ID: <20181210164016.0a3cf27a@xps13> (raw)
In-Reply-To: <BYASPR01MB00310C7F883FF6E06A2DA5C5DBAA0@BYASPR01MB0031.namprd08.prod.outlook.com>
Hi Bean,
"Bean Huo (beanhuo)" <beanhuo@micron.com> wrote on Fri, 7 Dec 2018
13:12:56 +0000:
> >+Bean,
> >
> >Hi Thomas,
> >
> >First of all, I'd like to thank you for sharing this patch. I'm pretty sure this will
> >save days of painful debug sessions to a lot of people.
> >
> >On Thu, 29 Nov 2018 22:12:50 +0100 (CET) Thomas Gleixner
> ><tglx@linutronix.de> wrote:
> >
> >> On some Micron NAND chips block erase fails occasionaly despite the
> >> chip claiming that it succeeded. The flash block seems to be not
> >> completely erased and subsequent usage of the block results in hard to
> >> decode and very subtle failures or corruption.
> >>
> >> The exact reason is unknown, but experimentation has shown that it is
> >> only happening when erasing an erase block which is partially written.
> >> Partially written erase blocks are not uncommon with UBI/UBIFS. Note,
> >> that this does not always happen. It's a rare and random, but eventually
> >fatal failure.
> >>
> >> For now, just blindly write 6 pages to 0. Again experimentation has
> >> shown that it's not sufficient to write pages at the beginning of the
> >> erase block. There need to be pages written in the second half of the
> >> erase block as well. So write 3 pages before and past the middle of the block.
> >>
> >> Less than 6 pages might be sufficient, but it might even be necessary
> >> to write more pages to make sure that it's completely cured. Two pages
> >> still failed, but the 6 held up in a stress test scenario.
> >>
> >> This should be optimized by keeping track of writes, but that needs
> >> proper information about the issue.
> >>
> >> As it's just observation and experimentation based, it's probably wise
> >> to hold off on this until there is proper clarification about the root
> >> cause of the problem. The patch is for reference so others can avoid
> >> to decode this again, but there is no guarantee that it actually fixes
> >> the issue completely.
> >
> >I agree. I Cc-ed Bean from Micron. Maybe he can provide more information
> >on this issue.
> >
> >>
> >> Therefore:
> >>
> >> Not-yet-signed-off-by: Thomas Gleixner <tglx@linutronix.de>
> >>
> >> Cc: Boris Brezillon <boris.brezillon@bootlin.com>
> >> Cc: Miquel Raynal <miquel.raynal@bootlin.com>
> >> Cc: Richard Weinberger <richard@nod.at>
> >>
> >> ---
> >>
> >> P.S.: This was debugged on an older kernel version (sigh) and ported
> >> forward without actual testing on mainline. My MTD foo is a bit
> >> rusty, so I won't be surprised if there are better ways to do that.
> >
> >Let's first wait for Bean's feedback before discussing implementation details.
> >BTW, do you remember the part number(s) of the flash(es) impacted by this
> >problem in your case?
> >
> Thanks, let me know this issue, I will look at this
I think it's time for you to comment on the situation.
Thanks,
Miquèl
next prev parent reply other threads:[~2018-12-10 15:40 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-11-29 21:12 [PATCH RFC] mtd: rawnand: Cure MICRON NAND partial erase issue Thomas Gleixner
2018-12-02 7:29 ` Boris Brezillon
2018-12-02 14:22 ` Thomas Gleixner
2018-12-07 13:12 ` [EXT] " Bean Huo (beanhuo)
2018-12-10 15:40 ` Miquel Raynal [this message]
2018-12-19 11:04 ` Bean Huo (beanhuo)
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