Raw NAND bad block marker positions

Raw NAND bad block marker positions

[Schrempf Frieder]

Hi,

the current implementation for checking/setting the bad block markers in 
raw NAND flash devices supports three setups for the position of the 
markers within the bad block:

* BBM in first page only
* BBM in last page only
* BBM in first or second page

This is controlled by the flags NAND_BBT_SCANLASTPAGE and 
NAND_BBT_SCAN2NDPAGE. It is not supported to set both flags to check 
first, second and last page.

Though some devices seem to require this kind of setup. We know of some 
ESMT SLC NANDs, that were accidentally shipped with BBM in the first or 
last page, instead of first or second page as claimed in the datasheet.

Also the documents for Cypress/Spansion/AMD NANDs claim that the 
software needs to check first, second and last page for BBMs (e.g. [1]).

It doesn't look like it would be difficult to make NAND_BBT_SCANLASTPAGE 
and NAND_BBT_SCAN2NDPAGE work together, but I wanted to ask if someone 
already stumbled upon this problem or if someone has any comments or 
suggestions, before trying to patch this?

Thanks,
Frieder

[1]: https://community.cypress.com/docs/DOC-10464

Re: Raw NAND bad block marker positions

[Boris Brezillon]

On Wed, 12 Dec 2018 10:32:04 +0000
Schrempf Frieder <frieder.schrempf@kontron.de> wrote:

> Hi,
> 
> the current implementation for checking/setting the bad block markers in 
> raw NAND flash devices supports three setups for the position of the 
> markers within the bad block:
> 
> * BBM in first page only
> * BBM in last page only
> * BBM in first or second page
> 
> This is controlled by the flags NAND_BBT_SCANLASTPAGE and 
> NAND_BBT_SCAN2NDPAGE. It is not supported to set both flags to check 
> first, second and last page.
> 
> Though some devices seem to require this kind of setup. We know of some 
> ESMT SLC NANDs, that were accidentally shipped with BBM in the first or 
> last page, instead of first or second page as claimed in the datasheet.
> 
> Also the documents for Cypress/Spansion/AMD NANDs claim that the 
> software needs to check first, second and last page for BBMs (e.g. [1]).
> 
> It doesn't look like it would be difficult to make NAND_BBT_SCANLASTPAGE 
> and NAND_BBT_SCAN2NDPAGE work together, but I wanted to ask if someone 
> already stumbled upon this problem or if someone has any comments or 
> suggestions, before trying to patch this?

Your suggestion sounds reasonable.

Re: Raw NAND bad block marker positions

[Miquel Raynal]

Hi Frieder,

Schrempf Frieder <frieder.schrempf@kontron.de> wrote on Wed, 12 Dec
2018 10:32:04 +0000:

> Hi,
> 
> the current implementation for checking/setting the bad block markers in 
> raw NAND flash devices supports three setups for the position of the 
> markers within the bad block:
> 
> * BBM in first page only
> * BBM in last page only
> * BBM in first or second page
> 
> This is controlled by the flags NAND_BBT_SCANLASTPAGE and 
> NAND_BBT_SCAN2NDPAGE. It is not supported to set both flags to check 
> first, second and last page.
> 
> Though some devices seem to require this kind of setup. We know of some 
> ESMT SLC NANDs, that were accidentally shipped with BBM in the first or 
> last page, instead of first or second page as claimed in the datasheet.
> 
> Also the documents for Cypress/Spansion/AMD NANDs claim that the 
> software needs to check first, second and last page for BBMs (e.g. [1]).
> 
> It doesn't look like it would be difficult to make NAND_BBT_SCANLASTPAGE 
> and NAND_BBT_SCAN2NDPAGE work together, but I wanted to ask if someone 
> already stumbled upon this problem or if someone has any comments or 
> suggestions, before trying to patch this?

I don't, but I would welcome such change, I don't think it is very
invasive anyway.


Thanks,
Miquèl