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From: Boris Brezillon <bbrezillon@kernel.org>
To: Linus Walleij <linus.walleij@linaro.org>
Cc: Marek Vasut <marek.vasut@gmail.com>,
	Brian Norris <computersforpeace@gmail.com>,
	David Woodhouse <dwmw2@infradead.org>,
	linux-mtd@lists.infradead.org,
	Richard Weinberger <richard@nod.at>
Subject: Re: [PATCH] mtd: rawnand: fsmc: Keep bank enable bit set
Date: Fri, 18 Jan 2019 07:36:23 +0100	[thread overview]
Message-ID: <20190118073623.05ec4cc5@bbrezillon> (raw)
In-Reply-To: <CACRpkdY22HjSFZxCHpSz6S6C0jx9g-AwBF6+CKZjKt5zy0O3uQ@mail.gmail.com>

On Thu, 17 Jan 2019 22:33:01 +0100
Linus Walleij <linus.walleij@linaro.org> wrote:

> On Mon, Jan 14, 2019 at 9:51 AM Boris Brezillon <bbrezillon@kernel.org> wrote:
> 
> > Not related to this patch, but I think we're missing a nand_reset()
> > call in the ->resume() path. Without it FSMC timings might be wrong
> > after a suspend if they're not defined in the DT. Would you mind sending
> > another patch to fix that,  
> 
> I looked into it, It looks like this:
> 
> static int fsmc_nand_resume(struct device *dev)
> {
>     struct fsmc_nand_data *host = dev_get_drvdata(dev);
> 
>     if (host) {
>         clk_prepare_enable(host->clk);
>         if (host->dev_timings)
>             fsmc_nand_setup(host, host->dev_timings);

->dev_timings is only allocated if timings are defined in the DT, but
the driver can also let the framework configure the timings through the
->setup_data_interface() method (approach that should be preferred for
all new boards). In this case ->dev_timings is NULL and we need to
reset the chip to re-apply the timings.

BTW, resetting the NAND chip at resume time is a sane thing to do if
you want to start in known state, so I'd recommend adding

	nand_reset(&host->nand);

here.

>     }
> 
>     return 0;
> }
> 

Regards,

Boris

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  reply	other threads:[~2019-01-18  6:36 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-01-09 21:51 [PATCH] mtd: rawnand: fsmc: Keep bank enable bit set Linus Walleij
2019-01-09 22:12 ` Boris Brezillon
2019-01-10  8:42   ` Miquel Raynal
2019-01-14  8:51 ` Boris Brezillon
2019-01-17 21:33   ` Linus Walleij
2019-01-18  6:36     ` Boris Brezillon [this message]
2019-01-18 11:44 ` Boris Brezillon

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