From: Boris Brezillon <bbrezillon@kernel.org>
To: Stefan Roese <sr@denx.de>
Cc: linux-mtd@lists.infradead.org,
Chuanhong Guo <gch981213@gmail.com>,
Frieder Schrempf <frieder.schrempf@kontron.de>,
Miquel Raynal <miquel.raynal@bootlin.com>
Subject: Re: [PATCH] mtd: spinand: Add support for GigaDevice GD5F1GQ4UC
Date: Thu, 24 Jan 2019 08:52:31 +0100 [thread overview]
Message-ID: <20190124085231.6f9ef74d@bbrezillon> (raw)
In-Reply-To: <0786ffac-ec46-f924-002a-5324c76bcb89@denx.de>
On Thu, 24 Jan 2019 08:35:32 +0100
Stefan Roese <sr@denx.de> wrote:
> On 23.01.19 13:57, Boris Brezillon wrote:
> > On Wed, 23 Jan 2019 13:40:50 +0100
> > Boris Brezillon <bbrezillon@kernel.org> wrote:
> >
> >>> This definitely does look better. I assume that we are we on the
> >>> right track now?
> >>
> >> Yep, and it confirms the ECC caps => 8bits/512bytes. Will send a proper
> >> commit for the fix I did and Cc you so you can add your
> >> Tested-by/Reviewed-by.
> >
> > Oh, looks like a side-effect of migrating to the dirmap approach
> > (merged in nand/next [1]) is that this bug does not exist. Can you test
> > the nand/next branch and let me know if it still works?
> >
> > [1]http://git.infradead.org/linux-mtd.git/shortlog/refs/heads/nand/next
>
> Unfortunately this does not seem to work. I was unable to boot my
> platform from this branch directly so I rebased all MTD/NAND related
> patches on top of the latest kernel.org tree for this. Here a log
> with this version (new error this time):
>
> root@mt7688:~# ./nandbiterrs /dev/mtd5 -i
> incremental biterrors test
> libmtd: error!: cannot write 2048 bytes to mtd5 (eraseblock 0, offset 0)
> error 5 (Input/output error)
> Failed to write page 0 in block 0
>
> Here a log with nandwrite errors:
>
> root@mt7688:~# flash_erase /dev/mtd5 0 1
> Erasing 128 Kibyte @ 0 -- 100 % complete
> root@mt7688:~# nandwrite --input-size=2048 /dev/mtd5 /dev/urandom
> Writing data to block 0 at offset 0x0
> libmtd: error!: cannot write 2048 bytes to mtd5 (eraseblock 0, offset 0)
> error 5 (Input/output error)
> Erasing failed write from 00000000 to 0x01ffff
> Writing data to block 1 at offset 0x20000
> libmtd: error!: cannot write 2048 bytes to mtd5 (eraseblock 1, offset 0)
> error 5 (Input/output error)
> Erasing failed write from 0x020000 to 0x03ffff
> Writing data to block 2 at offset 0x40000
> libmtd: error!: cannot write 2048 bytes to mtd5 (eraseblock 2, offset 0)
> error 5 (Input/output error)
> Erasing failed write from 0x040000 to 0x05ffff
> ...
>
> Any ideas on this?
BTW, what's the SPI controller connected to this chip?
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next prev parent reply other threads:[~2019-01-24 7:52 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-01-22 14:56 [PATCH] mtd: spinand: Add support for GigaDevice GD5F1GQ4UC Stefan Roese
2019-01-22 16:54 ` Boris Brezillon
2019-01-23 6:57 ` Stefan Roese
2019-01-23 7:52 ` Boris Brezillon
2019-01-23 8:23 ` Stefan Roese
2019-01-23 8:55 ` Boris Brezillon
2019-01-23 9:06 ` Stefan Roese
2019-01-23 9:35 ` Boris Brezillon
2019-01-23 10:04 ` Stefan Roese
2019-01-23 11:25 ` Boris Brezillon
2019-01-23 11:28 ` Boris Brezillon
2019-01-23 11:37 ` Stefan Roese
2019-01-23 12:18 ` Stefan Roese
2019-01-23 12:22 ` Boris Brezillon
2019-01-23 12:34 ` Stefan Roese
2019-01-23 12:40 ` Boris Brezillon
2019-01-23 12:57 ` Boris Brezillon
2019-01-23 13:20 ` Stefan Roese
2019-01-24 7:35 ` Stefan Roese
2019-01-24 7:50 ` Boris Brezillon
2019-01-24 8:00 ` Stefan Roese
2019-01-24 8:14 ` Boris Brezillon
2019-01-24 8:52 ` Stefan Roese
2019-01-24 9:04 ` Boris Brezillon
2019-01-24 9:19 ` Boris Brezillon
2019-01-24 10:57 ` Stefan Roese
2019-01-24 11:14 ` Boris Brezillon
2019-01-24 11:59 ` Stefan Roese
2019-01-24 12:18 ` Boris Brezillon
2019-01-24 12:28 ` Stefan Roese
2019-01-24 12:41 ` Boris Brezillon
2019-01-24 13:59 ` Stefan Roese
2019-01-24 16:36 ` Boris Brezillon
2019-01-24 8:34 ` Boris Brezillon
2019-01-24 7:52 ` Boris Brezillon [this message]
2019-01-24 8:00 ` Stefan Roese
2019-01-22 16:58 ` Boris Brezillon
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