[PATCH 1/2 v2] mtd: rawnand: fsmc: Reset NAND timings on resume()

[PATCH 1/2 v2] mtd: rawnand: fsmc: Reset NAND timings on resume()

[Linus Walleij]

When we go through a suspend/resume cycle the NAND
timings and other settings may have been lost so reset
the chip to bring it up in a known working state.

The FSMC only supports single CS chips so we only need
to call nand_reset(chip, 0).

Cc: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
ChangeLog v1->v2:
- Update commit message.
---
 drivers/mtd/nand/raw/fsmc_nand.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/mtd/nand/raw/fsmc_nand.c b/drivers/mtd/nand/raw/fsmc_nand.c
index c9149a37f8f0..4050843dd35e 100644
--- a/drivers/mtd/nand/raw/fsmc_nand.c
+++ b/drivers/mtd/nand/raw/fsmc_nand.c
@@ -1164,6 +1164,7 @@ static int fsmc_nand_resume(struct device *dev)
 		clk_prepare_enable(host->clk);
 		if (host->dev_timings)
 			fsmc_nand_setup(host, host->dev_timings);
+		nand_reset(&host->nand, 0);
 	}
 
 	return 0;
-- 
2.20.1


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[PATCH 2/2 v2] mtd: rawnand: fsmc: Disable NAND on remove()

[Linus Walleij]

This disables the NAND on remove() and the errorpath,
making sure the chipselect gets deasserted when the
NAND is not in use.

Cc: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
ChangeLog v1->v2:
- Break out NAND bank disable code into its own function.
---
 drivers/mtd/nand/raw/fsmc_nand.c | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/drivers/mtd/nand/raw/fsmc_nand.c b/drivers/mtd/nand/raw/fsmc_nand.c
index 4050843dd35e..6c7ca41354be 100644
--- a/drivers/mtd/nand/raw/fsmc_nand.c
+++ b/drivers/mtd/nand/raw/fsmc_nand.c
@@ -965,6 +965,19 @@ static const struct nand_controller_ops fsmc_nand_controller_ops = {
 	.setup_data_interface = fsmc_setup_data_interface,
 };
 
+/**
+ * fsmc_nand_disable() - Disables the NAND bank
+ * @host: The instance to disable
+ */
+static void fsmc_nand_disable(struct fsmc_nand_data *host)
+{
+	u32 val;
+
+	val = readl(host->regs_va + FSMC_PC);
+	val &= ~FSMC_ENABLE;
+	writel(val, host->regs_va + FSMC_PC);
+}
+
 /*
  * fsmc_nand_probe - Probe function
  * @pdev:       platform device structure
@@ -1120,6 +1133,7 @@ static int __init fsmc_nand_probe(struct platform_device *pdev)
 	if (host->mode == USE_DMA_ACCESS)
 		dma_release_channel(host->read_dma_chan);
 disable_clk:
+	fsmc_nand_disable(host);
 	clk_disable_unprepare(host->clk);
 
 	return ret;
@@ -1134,6 +1148,7 @@ static int fsmc_nand_remove(struct platform_device *pdev)
 
 	if (host) {
 		nand_release(&host->nand);
+		fsmc_nand_disable(host);
 
 		if (host->mode == USE_DMA_ACCESS) {
 			dma_release_channel(host->write_dma_chan);
-- 
2.20.1


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Re: [PATCH 1/2 v2] mtd: rawnand: fsmc: Reset NAND timings on resume()

[Miquel Raynal]

Hi Linus,

Linus Walleij <linus.walleij@linaro.org> wrote on Sat, 26 Jan 2019
14:10:55 +0100:

> When we go through a suspend/resume cycle the NAND
> timings and other settings may have been lost so reset
> the chip to bring it up in a known working state.
> 
> The FSMC only supports single CS chips so we only need
> to call nand_reset(chip, 0).
> 
> Cc: Miquel Raynal <miquel.raynal@bootlin.com>
> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
> ---

Both patches applied to nand/next.

Thanks,
Miquèl

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