* [PATCH 0/2] PL353 SW ECC fixes
@ 2026-01-21 15:51 Andrea Scian via B4 Relay
2026-01-21 15:51 ` [PATCH 1/2] mtd: rawnand: pl353: Fix software ECC support Andrea Scian via B4 Relay
2026-01-21 15:51 ` [PATCH 2/2] mtd: rawnand: pl353: Add message about ECC mode Andrea Scian via B4 Relay
0 siblings, 2 replies; 5+ messages in thread
From: Andrea Scian via B4 Relay @ 2026-01-21 15:51 UTC (permalink / raw)
To: Miquel Raynal, Michal Simek, Richard Weinberger,
Vignesh Raghavendra
Cc: linux-mtd, linux-kernel, Andrea Scian
PL353 has some known errata with its ECC implementation and it may be
useful to switch to software ECC, to avoid issue with this.
On-die ECC is already supported (while I didn't test it) but when
enabling SW ECC we get operation-not-supported error during page write
(page read already work correctly)
IMHO it's enough to have 1-bit Hamming ECC correction, because this is
the only one supported on PL353, but this might be a wrong assumption.
This has been tested with nandflipbits and mtd_nandbiterrs
Signed-off-by: Andrea Scian <andrea.scian@dave.eu>
---
Andrea Scian (2):
mtd: rawnand: pl353: Fix software ECC support
mtd: rawnand: pl353: Add message about ECC mode
drivers/mtd/nand/raw/pl35x-nand-controller.c | 5 +++++
1 file changed, 5 insertions(+)
---
base-commit: 24d479d26b25bce5faea3ddd9fa8f3a6c3129ea7
change-id: 20260121-pl353-soft-ecc-support-794e1e75373a
Best regards,
--
Andrea Scian <andrea.scian@dave.eu>
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^ permalink raw reply [flat|nested] 5+ messages in thread* [PATCH 1/2] mtd: rawnand: pl353: Fix software ECC support
2026-01-21 15:51 [PATCH 0/2] PL353 SW ECC fixes Andrea Scian via B4 Relay
@ 2026-01-21 15:51 ` Andrea Scian via B4 Relay
2026-01-23 9:54 ` Michal Simek
2026-01-21 15:51 ` [PATCH 2/2] mtd: rawnand: pl353: Add message about ECC mode Andrea Scian via B4 Relay
1 sibling, 1 reply; 5+ messages in thread
From: Andrea Scian via B4 Relay @ 2026-01-21 15:51 UTC (permalink / raw)
To: Miquel Raynal, Michal Simek, Richard Weinberger,
Vignesh Raghavendra
Cc: linux-mtd, linux-kernel, Andrea Scian
From: Andrea Scian <andrea.scian@dave.eu>
We need to set another couple of fields in ecc structure to allow
choosing SW ECC instead of HW one, otherwise write operation fail.
Signed-off-by: Andrea Scian <andrea.scian@dave.eu>
---
drivers/mtd/nand/raw/pl35x-nand-controller.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/mtd/nand/raw/pl35x-nand-controller.c b/drivers/mtd/nand/raw/pl35x-nand-controller.c
index 11bd90e3f18cb..fcb62b9ec947b 100644
--- a/drivers/mtd/nand/raw/pl35x-nand-controller.c
+++ b/drivers/mtd/nand/raw/pl35x-nand-controller.c
@@ -976,6 +976,8 @@ static int pl35x_nand_attach_chip(struct nand_chip *chip)
fallthrough;
case NAND_ECC_ENGINE_TYPE_NONE:
case NAND_ECC_ENGINE_TYPE_SOFT:
+ chip->ecc.algo = NAND_ECC_ALGO_HAMMING;
+ chip->ecc.write_page_raw = nand_monolithic_write_page_raw;
break;
case NAND_ECC_ENGINE_TYPE_ON_HOST:
ret = pl35x_nand_init_hw_ecc_controller(nfc, chip);
--
2.43.0
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^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH 1/2] mtd: rawnand: pl353: Fix software ECC support
2026-01-21 15:51 ` [PATCH 1/2] mtd: rawnand: pl353: Fix software ECC support Andrea Scian via B4 Relay
@ 2026-01-23 9:54 ` Michal Simek
0 siblings, 0 replies; 5+ messages in thread
From: Michal Simek @ 2026-01-23 9:54 UTC (permalink / raw)
To: andrea.scian, Miquel Raynal, Richard Weinberger,
Vignesh Raghavendra, Mahapatra, Amit Kumar
Cc: linux-mtd, linux-kernel
+Amit,
On 1/21/26 16:51, Andrea Scian via B4 Relay wrote:
> From: Andrea Scian <andrea.scian@dave.eu>
>
> We need to set another couple of fields in ecc structure to allow
> choosing SW ECC instead of HW one, otherwise write operation fail.
>
> Signed-off-by: Andrea Scian <andrea.scian@dave.eu>
> ---
> drivers/mtd/nand/raw/pl35x-nand-controller.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/drivers/mtd/nand/raw/pl35x-nand-controller.c b/drivers/mtd/nand/raw/pl35x-nand-controller.c
> index 11bd90e3f18cb..fcb62b9ec947b 100644
> --- a/drivers/mtd/nand/raw/pl35x-nand-controller.c
> +++ b/drivers/mtd/nand/raw/pl35x-nand-controller.c
> @@ -976,6 +976,8 @@ static int pl35x_nand_attach_chip(struct nand_chip *chip)
> fallthrough;
> case NAND_ECC_ENGINE_TYPE_NONE:
> case NAND_ECC_ENGINE_TYPE_SOFT:
> + chip->ecc.algo = NAND_ECC_ALGO_HAMMING;
> + chip->ecc.write_page_raw = nand_monolithic_write_page_raw;
> break;
> case NAND_ECC_ENGINE_TYPE_ON_HOST:
> ret = pl35x_nand_init_hw_ecc_controller(nfc, chip);
>
Amit: Can you please test this and review it?
Thanks,
Michal
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^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH 2/2] mtd: rawnand: pl353: Add message about ECC mode
2026-01-21 15:51 [PATCH 0/2] PL353 SW ECC fixes Andrea Scian via B4 Relay
2026-01-21 15:51 ` [PATCH 1/2] mtd: rawnand: pl353: Fix software ECC support Andrea Scian via B4 Relay
@ 2026-01-21 15:51 ` Andrea Scian via B4 Relay
2026-01-23 9:46 ` Michal Simek
1 sibling, 1 reply; 5+ messages in thread
From: Andrea Scian via B4 Relay @ 2026-01-21 15:51 UTC (permalink / raw)
To: Miquel Raynal, Michal Simek, Richard Weinberger,
Vignesh Raghavendra
Cc: linux-mtd, linux-kernel, Andrea Scian
From: Andrea Scian <andrea.scian@dave.eu>
This just add some information on kernel log about the selected ECC
Signed-off-by: Andrea Scian <andrea.scian@dave.eu>
---
drivers/mtd/nand/raw/pl35x-nand-controller.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/mtd/nand/raw/pl35x-nand-controller.c b/drivers/mtd/nand/raw/pl35x-nand-controller.c
index fcb62b9ec947b..4ce4c6f59b827 100644
--- a/drivers/mtd/nand/raw/pl35x-nand-controller.c
+++ b/drivers/mtd/nand/raw/pl35x-nand-controller.c
@@ -970,16 +970,19 @@ static int pl35x_nand_attach_chip(struct nand_chip *chip)
switch (chip->ecc.engine_type) {
case NAND_ECC_ENGINE_TYPE_ON_DIE:
+ dev_info(nfc->dev, "Using on-die ECC\n");
/* Keep these legacy BBT descriptors for ON_DIE situations */
chip->bbt_td = &bbt_main_descr;
chip->bbt_md = &bbt_mirror_descr;
fallthrough;
case NAND_ECC_ENGINE_TYPE_NONE:
case NAND_ECC_ENGINE_TYPE_SOFT:
+ dev_info(nfc->dev, "Using software ECC (Hamming 1-bit/512B)\n");
chip->ecc.algo = NAND_ECC_ALGO_HAMMING;
chip->ecc.write_page_raw = nand_monolithic_write_page_raw;
break;
case NAND_ECC_ENGINE_TYPE_ON_HOST:
+ dev_info(nfc->dev, "Using hardware ECC\n");
ret = pl35x_nand_init_hw_ecc_controller(nfc, chip);
if (ret)
return ret;
--
2.43.0
______________________________________________________
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http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply related [flat|nested] 5+ messages in thread* Re: [PATCH 2/2] mtd: rawnand: pl353: Add message about ECC mode
2026-01-21 15:51 ` [PATCH 2/2] mtd: rawnand: pl353: Add message about ECC mode Andrea Scian via B4 Relay
@ 2026-01-23 9:46 ` Michal Simek
0 siblings, 0 replies; 5+ messages in thread
From: Michal Simek @ 2026-01-23 9:46 UTC (permalink / raw)
To: andrea.scian, Miquel Raynal, Richard Weinberger,
Vignesh Raghavendra
Cc: linux-mtd, linux-kernel
On 1/21/26 16:51, Andrea Scian via B4 Relay wrote:
> From: Andrea Scian <andrea.scian@dave.eu>
>
> This just add some information on kernel log about the selected ECC
>
> Signed-off-by: Andrea Scian <andrea.scian@dave.eu>
> ---
> drivers/mtd/nand/raw/pl35x-nand-controller.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/drivers/mtd/nand/raw/pl35x-nand-controller.c b/drivers/mtd/nand/raw/pl35x-nand-controller.c
> index fcb62b9ec947b..4ce4c6f59b827 100644
> --- a/drivers/mtd/nand/raw/pl35x-nand-controller.c
> +++ b/drivers/mtd/nand/raw/pl35x-nand-controller.c
> @@ -970,16 +970,19 @@ static int pl35x_nand_attach_chip(struct nand_chip *chip)
>
> switch (chip->ecc.engine_type) {
> case NAND_ECC_ENGINE_TYPE_ON_DIE:
> + dev_info(nfc->dev, "Using on-die ECC\n");
> /* Keep these legacy BBT descriptors for ON_DIE situations */
> chip->bbt_td = &bbt_main_descr;
> chip->bbt_md = &bbt_mirror_descr;
> fallthrough;
> case NAND_ECC_ENGINE_TYPE_NONE:
> case NAND_ECC_ENGINE_TYPE_SOFT:
> + dev_info(nfc->dev, "Using software ECC (Hamming 1-bit/512B)\n");
> chip->ecc.algo = NAND_ECC_ALGO_HAMMING;
> chip->ecc.write_page_raw = nand_monolithic_write_page_raw;
> break;
> case NAND_ECC_ENGINE_TYPE_ON_HOST:
> + dev_info(nfc->dev, "Using hardware ECC\n");
> ret = pl35x_nand_init_hw_ecc_controller(nfc, chip);
> if (ret)
> return ret;
>
We are going in a way that we want to have less messages not more.
That's why please move it to dev_dbg() instead.
Thanks,
Michal
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^ permalink raw reply [flat|nested] 5+ messages in thread
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2026-01-21 15:51 [PATCH 0/2] PL353 SW ECC fixes Andrea Scian via B4 Relay
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2026-01-23 9:54 ` Michal Simek
2026-01-21 15:51 ` [PATCH 2/2] mtd: rawnand: pl353: Add message about ECC mode Andrea Scian via B4 Relay
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