[PATCH 1/3] mtd: rawnand: Add a NAND_NO_BBM_QUIRK flag

[PATCH 1/3] mtd: rawnand: Add a NAND_NO_BBM_QUIRK flag

[Boris Brezillon]

Some controllers with embedded ECC engines override the BBM marker with
data or ECC bytes, thus making bad block detection through bad block
marker impossible. Let's flag those chips so the core knows it shouldn't
check the BBM and consider all blocks good.

This should allow us to get rid of two implementers of the
legacy.block_bad() hook.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
---
 drivers/mtd/nand/raw/nand_base.c | 3 +++
 include/linux/mtd/rawnand.h      | 8 ++++++++
 2 files changed, 11 insertions(+)

diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c
index f81b54634061..749ef0b40684 100644
--- a/drivers/mtd/nand/raw/nand_base.c
+++ b/drivers/mtd/nand/raw/nand_base.c
@@ -345,6 +345,9 @@ static int nand_block_bad(struct nand_chip *chip, loff_t ofs)
 
 static int nand_isbad_bbm(struct nand_chip *chip, loff_t ofs)
 {
+	if (chip->options & NAND_NO_BBM_QUIRK)
+		return 0;
+
 	if (chip->legacy.block_bad)
 		return chip->legacy.block_bad(chip, ofs);
 
diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h
index 99f4ac47c8d3..37613dd9e04b 100644
--- a/include/linux/mtd/rawnand.h
+++ b/include/linux/mtd/rawnand.h
@@ -222,6 +222,14 @@ enum nand_ecc_algo {
  */
 #define NAND_KEEP_TIMINGS	0x00800000
 
+/*
+ * Some controllers with pipelined ECC engines override the BBM marker with
+ * data or ECC bytes, thus making bad block detection through bad block marker
+ * impossible. Let's flag those chips so the core knows it shouldn't check the
+ * BBM and consider all blocks good.
+ */
+#define NAND_NO_BBM_QUIRK	0
+
 /* Cell info constants */
 #define NAND_CI_CHIPNR_MSK	0x03
 #define NAND_CI_CELLTYPE_MSK	0x0C
-- 
2.25.3


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[PATCH 2/3] mtd: rawnand: cafe: Set the NAND_NO_BBM_QUIRK flag

[Boris Brezillon]

We have a dummy block_bad() implementation returning 0. Let's set the
NAND_NO_BBM_QUIRK flag and let the core take care of that.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
---
 drivers/mtd/nand/raw/cafe_nand.c | 11 ++---------
 1 file changed, 2 insertions(+), 9 deletions(-)

diff --git a/drivers/mtd/nand/raw/cafe_nand.c b/drivers/mtd/nand/raw/cafe_nand.c
index 2d1c22dc88c1..2a0df13df5f3 100644
--- a/drivers/mtd/nand/raw/cafe_nand.c
+++ b/drivers/mtd/nand/raw/cafe_nand.c
@@ -546,11 +546,6 @@ static int cafe_nand_write_page_lowlevel(struct nand_chip *chip,
 	return nand_prog_page_end_op(chip);
 }
 
-static int cafe_nand_block_bad(struct nand_chip *chip, loff_t ofs)
-{
-	return 0;
-}
-
 /* F_2[X]/(X**6+X+1)  */
 static unsigned short gf64_mul(u8 a, u8 b)
 {
@@ -718,10 +713,8 @@ static int cafe_nand_probe(struct pci_dev *pdev,
 	/* Enable the following for a flash based bad block table */
 	cafe->nand.bbt_options = NAND_BBT_USE_FLASH;
 
-	if (skipbbt) {
-		cafe->nand.options |= NAND_SKIP_BBTSCAN;
-		cafe->nand.legacy.block_bad = cafe_nand_block_bad;
-	}
+	if (skipbbt)
+		cafe->nand.options |= NAND_SKIP_BBTSCAN | NAND_NO_BBM_QUIRK;
 
 	if (numtimings && numtimings != 3) {
 		dev_warn(&cafe->pdev->dev, "%d timing register values ignored; precisely three are required\n", numtimings);
-- 
2.25.3


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Re: [PATCH 2/3] mtd: rawnand: cafe: Set the NAND_NO_BBM_QUIRK flag

[Miquel Raynal]

Hi Boris,

Boris Brezillon <boris.brezillon@collabora.com> wrote on Mon, 27 Apr
2020 09:24:52 +0200:

> We have a dummy block_bad() implementation returning 0. Let's set the
> NAND_NO_BBM_QUIRK flag and let the core take care of that.
> 
> Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
> ---
>  drivers/mtd/nand/raw/cafe_nand.c | 11 ++---------
>  1 file changed, 2 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/mtd/nand/raw/cafe_nand.c b/drivers/mtd/nand/raw/cafe_nand.c
> index 2d1c22dc88c1..2a0df13df5f3 100644
> --- a/drivers/mtd/nand/raw/cafe_nand.c
> +++ b/drivers/mtd/nand/raw/cafe_nand.c
> @@ -546,11 +546,6 @@ static int cafe_nand_write_page_lowlevel(struct nand_chip *chip,
>  	return nand_prog_page_end_op(chip);
>  }
>  
> -static int cafe_nand_block_bad(struct nand_chip *chip, loff_t ofs)
> -{
> -	return 0;
> -}
> -
>  /* F_2[X]/(X**6+X+1)  */
>  static unsigned short gf64_mul(u8 a, u8 b)
>  {
> @@ -718,10 +713,8 @@ static int cafe_nand_probe(struct pci_dev *pdev,
>  	/* Enable the following for a flash based bad block table */
>  	cafe->nand.bbt_options = NAND_BBT_USE_FLASH;
>  
> -	if (skipbbt) {
> -		cafe->nand.options |= NAND_SKIP_BBTSCAN;
> -		cafe->nand.legacy.block_bad = cafe_nand_block_bad;
> -	}
> +	if (skipbbt)
> +		cafe->nand.options |= NAND_SKIP_BBTSCAN | NAND_NO_BBM_QUIRK;
>  
>  	if (numtimings && numtimings != 3) {
>  		dev_warn(&cafe->pdev->dev, "%d timing register values ignored; precisely three are required\n", numtimings);

Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>

Thanks,
Miquèl

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[PATCH 3/3] mtd: rawnand: diskonchip: Set the NAND_NO_BBM_QUIRK flag

[Boris Brezillon]

We have a dummy block_bad() implementation returning 0. Let's set the
NAND_NO_BBM_QUIRK flag and let the core take care of that.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
---
 drivers/mtd/nand/raw/diskonchip.c | 10 +---------
 1 file changed, 1 insertion(+), 9 deletions(-)

diff --git a/drivers/mtd/nand/raw/diskonchip.c b/drivers/mtd/nand/raw/diskonchip.c
index c2a391ad2c35..4c3d04da4cee 100644
--- a/drivers/mtd/nand/raw/diskonchip.c
+++ b/drivers/mtd/nand/raw/diskonchip.c
@@ -776,13 +776,6 @@ static int doc200x_dev_ready(struct nand_chip *this)
 	}
 }
 
-static int doc200x_block_bad(struct nand_chip *this, loff_t ofs)
-{
-	/* This is our last resort if we couldn't find or create a BBT.  Just
-	   pretend all blocks are good. */
-	return 0;
-}
-
 static void doc200x_enable_hwecc(struct nand_chip *this, int mode)
 {
 	struct doc_priv *doc = nand_get_controller_data(this);
@@ -1578,7 +1571,6 @@ static int __init doc_probe(unsigned long physadr)
 	nand->legacy.cmd_ctrl		= doc200x_hwcontrol;
 	nand->legacy.dev_ready	= doc200x_dev_ready;
 	nand->legacy.waitfunc	= doc200x_wait;
-	nand->legacy.block_bad	= doc200x_block_bad;
 	nand->ecc.hwctl		= doc200x_enable_hwecc;
 	nand->ecc.calculate	= doc200x_calculate_ecc;
 	nand->ecc.correct	= doc200x_correct_data;
@@ -1590,7 +1582,7 @@ static int __init doc_probe(unsigned long physadr)
 	nand->ecc.options	= NAND_ECC_GENERIC_ERASED_CHECK;
 	nand->bbt_options	= NAND_BBT_USE_FLASH;
 	/* Skip the automatic BBT scan so we can run it manually */
-	nand->options		|= NAND_SKIP_BBTSCAN;
+	nand->options		|= NAND_SKIP_BBTSCAN | NAND_NO_BBM_QUIRK;
 
 	doc->physadr		= physadr;
 	doc->virtadr		= virtadr;
-- 
2.25.3


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Re: [PATCH 3/3] mtd: rawnand: diskonchip: Set the NAND_NO_BBM_QUIRK flag

[Miquel Raynal]

Hi Boris,

Boris Brezillon <boris.brezillon@collabora.com> wrote on Mon, 27 Apr
2020 09:24:53 +0200:

> We have a dummy block_bad() implementation returning 0. Let's set the
> NAND_NO_BBM_QUIRK flag and let the core take care of that.
> 
> Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
> ---
>  drivers/mtd/nand/raw/diskonchip.c | 10 +---------
>  1 file changed, 1 insertion(+), 9 deletions(-)
> 
> diff --git a/drivers/mtd/nand/raw/diskonchip.c b/drivers/mtd/nand/raw/diskonchip.c
> index c2a391ad2c35..4c3d04da4cee 100644
> --- a/drivers/mtd/nand/raw/diskonchip.c
> +++ b/drivers/mtd/nand/raw/diskonchip.c
> @@ -776,13 +776,6 @@ static int doc200x_dev_ready(struct nand_chip *this)
>  	}
>  }
>  
> -static int doc200x_block_bad(struct nand_chip *this, loff_t ofs)
> -{
> -	/* This is our last resort if we couldn't find or create a BBT.  Just
> -	   pretend all blocks are good. */
> -	return 0;
> -}
> -
>  static void doc200x_enable_hwecc(struct nand_chip *this, int mode)
>  {
>  	struct doc_priv *doc = nand_get_controller_data(this);
> @@ -1578,7 +1571,6 @@ static int __init doc_probe(unsigned long physadr)
>  	nand->legacy.cmd_ctrl		= doc200x_hwcontrol;
>  	nand->legacy.dev_ready	= doc200x_dev_ready;
>  	nand->legacy.waitfunc	= doc200x_wait;
> -	nand->legacy.block_bad	= doc200x_block_bad;
>  	nand->ecc.hwctl		= doc200x_enable_hwecc;
>  	nand->ecc.calculate	= doc200x_calculate_ecc;
>  	nand->ecc.correct	= doc200x_correct_data;
> @@ -1590,7 +1582,7 @@ static int __init doc_probe(unsigned long physadr)
>  	nand->ecc.options	= NAND_ECC_GENERIC_ERASED_CHECK;
>  	nand->bbt_options	= NAND_BBT_USE_FLASH;
>  	/* Skip the automatic BBT scan so we can run it manually */
> -	nand->options		|= NAND_SKIP_BBTSCAN;
> +	nand->options		|= NAND_SKIP_BBTSCAN | NAND_NO_BBM_QUIRK;
>  
>  	doc->physadr		= physadr;
>  	doc->virtadr		= virtadr;


Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>


Thanks,
Miquèl

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Re: [PATCH 1/3] mtd: rawnand: Add a NAND_NO_BBM_QUIRK flag

[Boris Brezillon]

On Mon, 27 Apr 2020 09:24:51 +0200
Boris Brezillon <boris.brezillon@collabora.com> wrote:

> Some controllers with embedded ECC engines override the BBM marker with
> data or ECC bytes, thus making bad block detection through bad block
> marker impossible. Let's flag those chips so the core knows it shouldn't
> check the BBM and consider all blocks good.
> 
> This should allow us to get rid of two implementers of the
> legacy.block_bad() hook.
> 
> Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
> ---
>  drivers/mtd/nand/raw/nand_base.c | 3 +++
>  include/linux/mtd/rawnand.h      | 8 ++++++++
>  2 files changed, 11 insertions(+)
> 
> diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c
> index f81b54634061..749ef0b40684 100644
> --- a/drivers/mtd/nand/raw/nand_base.c
> +++ b/drivers/mtd/nand/raw/nand_base.c
> @@ -345,6 +345,9 @@ static int nand_block_bad(struct nand_chip *chip, loff_t ofs)
>  
>  static int nand_isbad_bbm(struct nand_chip *chip, loff_t ofs)
>  {
> +	if (chip->options & NAND_NO_BBM_QUIRK)
> +		return 0;
> +
>  	if (chip->legacy.block_bad)
>  		return chip->legacy.block_bad(chip, ofs);
>  
> diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h
> index 99f4ac47c8d3..37613dd9e04b 100644
> --- a/include/linux/mtd/rawnand.h
> +++ b/include/linux/mtd/rawnand.h
> @@ -222,6 +222,14 @@ enum nand_ecc_algo {
>   */
>  #define NAND_KEEP_TIMINGS	0x00800000
>  
> +/*
> + * Some controllers with pipelined ECC engines override the BBM marker with
> + * data or ECC bytes, thus making bad block detection through bad block marker
> + * impossible. Let's flag those chips so the core knows it shouldn't check the
> + * BBM and consider all blocks good.
> + */
> +#define NAND_NO_BBM_QUIRK	0

Oops, should be 

#define NAND_NO_BBM_QUIRK	0x08000000

I'll have to rebase it on Miquel's series re-ordering the flag
definitions and using the BIT() macro anyway. But please don't take this
as an excuse for not reviewing this version :P.

> +
>  /* Cell info constants */
>  #define NAND_CI_CHIPNR_MSK	0x03
>  #define NAND_CI_CELLTYPE_MSK	0x0C


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Re: [PATCH 1/3] mtd: rawnand: Add a NAND_NO_BBM_QUIRK flag

[Miquel Raynal]

Boris Brezillon <boris.brezillon@collabora.com> wrote on Mon, 27 Apr
2020 09:28:36 +0200:

> On Mon, 27 Apr 2020 09:24:51 +0200
> Boris Brezillon <boris.brezillon@collabora.com> wrote:
> 
> > Some controllers with embedded ECC engines override the BBM marker with
> > data or ECC bytes, thus making bad block detection through bad block
> > marker impossible. Let's flag those chips so the core knows it shouldn't
> > check the BBM and consider all blocks good.
> > 
> > This should allow us to get rid of two implementers of the
> > legacy.block_bad() hook.
> > 
> > Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
> > ---
> >  drivers/mtd/nand/raw/nand_base.c | 3 +++
> >  include/linux/mtd/rawnand.h      | 8 ++++++++
> >  2 files changed, 11 insertions(+)
> > 
> > diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c
> > index f81b54634061..749ef0b40684 100644
> > --- a/drivers/mtd/nand/raw/nand_base.c
> > +++ b/drivers/mtd/nand/raw/nand_base.c
> > @@ -345,6 +345,9 @@ static int nand_block_bad(struct nand_chip *chip, loff_t ofs)
> >  
> >  static int nand_isbad_bbm(struct nand_chip *chip, loff_t ofs)
> >  {
> > +	if (chip->options & NAND_NO_BBM_QUIRK)
> > +		return 0;
> > +
> >  	if (chip->legacy.block_bad)
> >  		return chip->legacy.block_bad(chip, ofs);
> >  
> > diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h
> > index 99f4ac47c8d3..37613dd9e04b 100644
> > --- a/include/linux/mtd/rawnand.h
> > +++ b/include/linux/mtd/rawnand.h
> > @@ -222,6 +222,14 @@ enum nand_ecc_algo {
> >   */
> >  #define NAND_KEEP_TIMINGS	0x00800000
> >  
> > +/*
> > + * Some controllers with pipelined ECC engines override the BBM marker with
> > + * data or ECC bytes, thus making bad block detection through bad block marker
> > + * impossible. Let's flag those chips so the core knows it shouldn't check the
> > + * BBM and consider all blocks good.
> > + */
> > +#define NAND_NO_BBM_QUIRK	0  
> 
> Oops, should be 
> 
> #define NAND_NO_BBM_QUIRK	0x08000000
> 
> I'll have to rebase it on Miquel's series re-ordering the flag
> definitions and using the BIT() macro anyway. But please don't take this
> as an excuse for not reviewing this version :P.

Hehe, what did you say again about great minds? :)

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Re: [PATCH 1/3] mtd: rawnand: Add a NAND_NO_BBM_QUIRK flag

[Miquel Raynal]

Hi Boris,

Boris Brezillon <boris.brezillon@collabora.com> wrote on Mon, 27 Apr
2020 09:24:51 +0200:

> Some controllers with embedded ECC engines override the BBM marker with
> data or ECC bytes, thus making bad block detection through bad block
> marker impossible. Let's flag those chips so the core knows it shouldn't
> check the BBM and consider all blocks good.
> 
> This should allow us to get rid of two implementers of the
> legacy.block_bad() hook.
> 
> Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
> ---
>  drivers/mtd/nand/raw/nand_base.c | 3 +++
>  include/linux/mtd/rawnand.h      | 8 ++++++++
>  2 files changed, 11 insertions(+)
> 
> diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c
> index f81b54634061..749ef0b40684 100644
> --- a/drivers/mtd/nand/raw/nand_base.c
> +++ b/drivers/mtd/nand/raw/nand_base.c
> @@ -345,6 +345,9 @@ static int nand_block_bad(struct nand_chip *chip, loff_t ofs)
>  
>  static int nand_isbad_bbm(struct nand_chip *chip, loff_t ofs)
>  {
> +	if (chip->options & NAND_NO_BBM_QUIRK)
> +		return 0;
> +
>  	if (chip->legacy.block_bad)
>  		return chip->legacy.block_bad(chip, ofs);
>  
> diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h
> index 99f4ac47c8d3..37613dd9e04b 100644
> --- a/include/linux/mtd/rawnand.h
> +++ b/include/linux/mtd/rawnand.h
> @@ -222,6 +222,14 @@ enum nand_ecc_algo {
>   */
>  #define NAND_KEEP_TIMINGS	0x00800000
>  
> +/*
> + * Some controllers with pipelined ECC engines override the BBM marker with
> + * data or ECC bytes, thus making bad block detection through bad block marker
> + * impossible. Let's flag those chips so the core knows it shouldn't check the
> + * BBM and consider all blocks good.
> + */
> +#define NAND_NO_BBM_QUIRK	0

Zero? :)

Maybe we'll have to rebase this patch on top of the recent cleanup of
this portion, so that we define a nand_controller flag directly.

We'll see how it goes for the other series, I'll keep this change in
mind.

> +
>  /* Cell info constants */
>  #define NAND_CI_CHIPNR_MSK	0x03
>  #define NAND_CI_CELLTYPE_MSK	0x0C


Thanks,
Miquèl

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