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From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Boris Brezillon <boris.brezillon@collabora.com>
Cc: Richard Weinberger <richard@nod.at>,
	linux-mtd@lists.infradead.org,
	Vignesh Raghavendra <vigneshr@ti.com>,
	Tudor Ambarus <tudor.ambarus@microchip.com>
Subject: Re: [PATCH 1/3] mtd: rawnand: Add a NAND_NO_BBM_QUIRK flag
Date: Mon, 27 Apr 2020 21:30:32 +0200	[thread overview]
Message-ID: <20200427213032.7971dfc1@xps13> (raw)
In-Reply-To: <20200427092836.40152b2a@collabora.com>


Boris Brezillon <boris.brezillon@collabora.com> wrote on Mon, 27 Apr
2020 09:28:36 +0200:

> On Mon, 27 Apr 2020 09:24:51 +0200
> Boris Brezillon <boris.brezillon@collabora.com> wrote:
> 
> > Some controllers with embedded ECC engines override the BBM marker with
> > data or ECC bytes, thus making bad block detection through bad block
> > marker impossible. Let's flag those chips so the core knows it shouldn't
> > check the BBM and consider all blocks good.
> > 
> > This should allow us to get rid of two implementers of the
> > legacy.block_bad() hook.
> > 
> > Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
> > ---
> >  drivers/mtd/nand/raw/nand_base.c | 3 +++
> >  include/linux/mtd/rawnand.h      | 8 ++++++++
> >  2 files changed, 11 insertions(+)
> > 
> > diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c
> > index f81b54634061..749ef0b40684 100644
> > --- a/drivers/mtd/nand/raw/nand_base.c
> > +++ b/drivers/mtd/nand/raw/nand_base.c
> > @@ -345,6 +345,9 @@ static int nand_block_bad(struct nand_chip *chip, loff_t ofs)
> >  
> >  static int nand_isbad_bbm(struct nand_chip *chip, loff_t ofs)
> >  {
> > +	if (chip->options & NAND_NO_BBM_QUIRK)
> > +		return 0;
> > +
> >  	if (chip->legacy.block_bad)
> >  		return chip->legacy.block_bad(chip, ofs);
> >  
> > diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h
> > index 99f4ac47c8d3..37613dd9e04b 100644
> > --- a/include/linux/mtd/rawnand.h
> > +++ b/include/linux/mtd/rawnand.h
> > @@ -222,6 +222,14 @@ enum nand_ecc_algo {
> >   */
> >  #define NAND_KEEP_TIMINGS	0x00800000
> >  
> > +/*
> > + * Some controllers with pipelined ECC engines override the BBM marker with
> > + * data or ECC bytes, thus making bad block detection through bad block marker
> > + * impossible. Let's flag those chips so the core knows it shouldn't check the
> > + * BBM and consider all blocks good.
> > + */
> > +#define NAND_NO_BBM_QUIRK	0  
> 
> Oops, should be 
> 
> #define NAND_NO_BBM_QUIRK	0x08000000
> 
> I'll have to rebase it on Miquel's series re-ordering the flag
> definitions and using the BIT() macro anyway. But please don't take this
> as an excuse for not reviewing this version :P.

Hehe, what did you say again about great minds? :)

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  reply	other threads:[~2020-04-27 19:30 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-04-27  7:24 [PATCH 1/3] mtd: rawnand: Add a NAND_NO_BBM_QUIRK flag Boris Brezillon
2020-04-27  7:24 ` [PATCH 2/3] mtd: rawnand: cafe: Set the " Boris Brezillon
2020-04-27 19:28   ` Miquel Raynal
2020-04-27  7:24 ` [PATCH 3/3] mtd: rawnand: diskonchip: " Boris Brezillon
2020-04-27 19:30   ` Miquel Raynal
2020-04-27  7:28 ` [PATCH 1/3] mtd: rawnand: Add a " Boris Brezillon
2020-04-27 19:30   ` Miquel Raynal [this message]
2020-04-27 19:26 ` Miquel Raynal

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