From: Boris Brezillon <boris.brezillon@collabora.com>
To: Yicong Yang <yangyicong@hisilicon.com>
Cc: vigneshr@ti.com, tudor.ambarus@microchip.com, richard@nod.at,
john.garry@huawei.com, linux-spi@vger.kernel.org,
broonie@kernel.org, linux-mtd@lists.infradead.org,
miquel.raynal@bootlin.com
Subject: Re: [RFC PATCH 3/3] spi: hisi-sfc-v3xx: Add prepare/unprepare methods to avoid race condition
Date: Tue, 26 May 2020 11:43:48 +0200 [thread overview]
Message-ID: <20200526114348.6295df6b@collabora.com> (raw)
In-Reply-To: <1590060231-23242-4-git-send-email-yangyicong@hisilicon.com>
On Thu, 21 May 2020 19:23:51 +0800
Yicong Yang <yangyicong@hisilicon.com> wrote:
> The controller can be shared with the firmware, which may cause race
> problems. As most read/write/erase/lock/unlock of spi-nor flash are
> composed of a set of operations, while the firmware may use the controller
> and start its own operation in the middle of the process started by the
> kernel driver, which may lead to the kernel driver's function broken.
>
> Bit[20] in HISI_SFC_V3XX_CMD_CFG register plays a role of a lock, to
> protect the controller from firmware access, which means the firmware
> cannot reach the controller if the driver set the bit. Add prepare/
> unprepare methods for the controller, we'll hold the lock in prepare
> method and release it in unprepare method, which will solve the race
> issue.
Okay, so it looks like what we really need is a way to pass sequences
(multiple operations) that are expected to be issued without
interruptions. I'd prefer extending the spi_mem interface to allow that:
int spi_mem_exec_sequence(struct spi_mem *spimem,
unsigned int num_ops,
const struct spi_mem_op *ops);
struct spi_controller_mem_ops {
...
int (*exec_sequence)(struct spi_mem *mem,
unsigned int num_ops,
const struct spi_mem_op *op);
...
};
The prepare/unprepare hooks are a bit too vague. Alternatively, we
could add functions to grab/release the controller lock, but I'm not
sure that's what we want since some controllers might be able to address
several devices in parallel, and locking the whole controller at the
spi-nor level would prevent that.
BTW, I don't know all the details about this lock or what this FW is
exactly (where it's running, what's his priority, what kind of
synchronization exists between Linux and the FW, ...), but I'm worried
about potential deadlocks here.
>
> Signed-off-by: Yicong Yang <yangyicong@hisilicon.com>
> ---
> drivers/spi/spi-hisi-sfc-v3xx.c | 41 ++++++++++++++++++++++++++++++++++++++++-
> 1 file changed, 40 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/spi/spi-hisi-sfc-v3xx.c b/drivers/spi/spi-hisi-sfc-v3xx.c
> index e3b5725..13c161c 100644
> --- a/drivers/spi/spi-hisi-sfc-v3xx.c
> +++ b/drivers/spi/spi-hisi-sfc-v3xx.c
> @@ -18,6 +18,7 @@
> #define HISI_SFC_V3XX_VERSION (0x1f8)
>
> #define HISI_SFC_V3XX_CMD_CFG (0x300)
> +#define HISI_SFC_V3XX_CMD_CFG_LOCK BIT(20)
> #define HISI_SFC_V3XX_CMD_CFG_DUAL_IN_DUAL_OUT (1 << 17)
> #define HISI_SFC_V3XX_CMD_CFG_DUAL_IO (2 << 17)
> #define HISI_SFC_V3XX_CMD_CFG_FULL_DIO (3 << 17)
> @@ -41,6 +42,34 @@ struct hisi_sfc_v3xx_host {
> int max_cmd_dword;
> };
>
> +int hisi_sfc_v3xx_op_prepare(struct spi_mem *mem)
> +{
> + struct spi_device *spi = mem->spi;
> + struct hisi_sfc_v3xx_host *host;
> + u32 reg = HISI_SFC_V3XX_CMD_CFG_LOCK;
> +
> + host = spi_controller_get_devdata(spi->master);
> +
> + writel(reg, host->regbase + HISI_SFC_V3XX_CMD_CFG);
> +
> + reg = readl(host->regbase + HISI_SFC_V3XX_CMD_CFG);
> + if (!(reg & HISI_SFC_V3XX_CMD_CFG_LOCK))
> + return -EIO;
> +
> + return 0;
> +}
> +
> +void hisi_sfc_v3xx_op_unprepare(struct spi_mem *mem)
> +{
> + struct spi_device *spi = mem->spi;
> + struct hisi_sfc_v3xx_host *host;
> +
> + host = spi_controller_get_devdata(spi->master);
> +
> + /* Release the lock and clear the command register. */
> + writel(0, host->regbase + HISI_SFC_V3XX_CMD_CFG);
> +}
> +
> #define HISI_SFC_V3XX_WAIT_TIMEOUT_US 1000000
> #define HISI_SFC_V3XX_WAIT_POLL_INTERVAL_US 10
>
> @@ -163,7 +192,15 @@ static int hisi_sfc_v3xx_generic_exec_op(struct hisi_sfc_v3xx_host *host,
> u8 chip_select)
> {
> int ret, len = op->data.nbytes;
> - u32 config = 0;
> + u32 config;
> +
> + /*
> + * The lock bit is in the command register. Clear the command
> + * field with lock bit held if it has been set in
> + * .prepare().
> + */
> + config = readl(host->regbase + HISI_SFC_V3XX_CMD_CFG);
> + config &= HISI_SFC_V3XX_CMD_CFG_LOCK;
>
> if (op->addr.nbytes)
> config |= HISI_SFC_V3XX_CMD_CFG_ADDR_EN_MSK;
> @@ -248,6 +285,8 @@ static int hisi_sfc_v3xx_exec_op(struct spi_mem *mem,
>
> static const struct spi_controller_mem_ops hisi_sfc_v3xx_mem_ops = {
> .adjust_op_size = hisi_sfc_v3xx_adjust_op_size,
> + .prepare = hisi_sfc_v3xx_op_prepare,
> + .unprepare = hisi_sfc_v3xx_op_unprepare,
> .exec_op = hisi_sfc_v3xx_exec_op,
> };
>
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next prev parent reply other threads:[~2020-05-26 9:43 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-21 11:23 [RFC PATCH 0/3] Add prepare/unprepare method in spi_controller_mem_ops Yicong Yang
2020-05-21 11:23 ` [RFC PATCH 1/3] spi: spi-mem: add optional prepare/unprepare methods " Yicong Yang
2020-05-21 11:23 ` [RFC PATCH 2/3] mtd: spi-nor: Add prepare/unprepare support for spimem device Yicong Yang
2020-05-21 11:23 ` [RFC PATCH 3/3] spi: hisi-sfc-v3xx: Add prepare/unprepare methods to avoid race condition Yicong Yang
2020-05-25 16:14 ` Pratyush Yadav
2020-05-26 9:27 ` Boris Brezillon
2020-05-26 9:30 ` Boris Brezillon
2020-05-27 8:18 ` Yicong Yang
2020-05-27 9:33 ` Pratyush Yadav
2020-05-27 10:33 ` Yicong Yang
2020-05-26 9:43 ` Boris Brezillon [this message]
2020-05-27 8:55 ` Yicong Yang
2020-05-27 9:20 ` Boris Brezillon
2020-05-27 10:16 ` Yicong Yang
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