From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.3 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_2 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4594BC433E1 for ; Tue, 26 May 2020 22:29:46 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 1BE4C2088E for ; Tue, 26 May 2020 22:29:45 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="cemyDAuo" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 1BE4C2088E Authentication-Results: mail.kernel.org; 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Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jdi44-0004Co-BA; Tue, 26 May 2020 22:28:52 +0000 Received: from bhuna.collabora.co.uk ([46.235.227.227]) by bombadil.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1jdi41-0004CC-GP for linux-mtd@lists.infradead.org; Tue, 26 May 2020 22:28:51 +0000 Received: from localhost (unknown [IPv6:2a01:e0a:2c:6930:b93f:9fae:b276:a89a]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) (Authenticated sender: bbrezillon) by bhuna.collabora.co.uk (Postfix) with ESMTPSA id D34832A35F5; Tue, 26 May 2020 23:28:47 +0100 (BST) Date: Wed, 27 May 2020 00:28:44 +0200 From: Boris Brezillon To: Miquel Raynal Subject: Re: [PATCH v5 28/28] mtd: rawnand: Allocate the best data interface structure dynamically Message-ID: <20200527002844.7e54aa22@collabora.com> In-Reply-To: <20200526191725.7591-29-miquel.raynal@bootlin.com> References: <20200526191725.7591-1-miquel.raynal@bootlin.com> <20200526191725.7591-29-miquel.raynal@bootlin.com> Organization: Collabora X-Mailer: Claws Mail 3.17.5 (GTK+ 2.24.32; x86_64-redhat-linux-gnu) MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200526_152849_807723_94832BCC X-CRM114-Status: GOOD ( 28.01 ) X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Rickard Andersson , Richard Weinberger , linux-mtd@lists.infradead.org, Vignesh Raghavendra , Tudor Ambarus Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-mtd" Errors-To: linux-mtd-bounces+linux-mtd=archiver.kernel.org@lists.infradead.org On Tue, 26 May 2020 21:17:25 +0200 Miquel Raynal wrote: > Instead of manipulating the statically allocated structure and copy > timings around, allocate one at identification time and save it in the > nand_chip structure once it has been initialized. > > This way, either there is a "best data interface" and the requested > timings will be these, or there is none, forcing the core to use the > default set, statically defined in the core, shared across all NAND > chips. > > Signed-off-by: Miquel Raynal > --- > drivers/mtd/nand/raw/nand_base.c | 42 ++++++++++++++++++++++---------- > include/linux/mtd/rawnand.h | 13 +++++++--- > 2 files changed, 39 insertions(+), 16 deletions(-) > > diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c > index 2547136a9cd7..247bf5faaf55 100644 > --- a/drivers/mtd/nand/raw/nand_base.c > +++ b/drivers/mtd/nand/raw/nand_base.c > @@ -947,7 +947,7 @@ static int nand_reset_data_interface(struct nand_chip *chip, int chipnr) > */ > static int nand_setup_data_interface(struct nand_chip *chip, int chipnr) > { > - u8 mode = chip->data_interface.timings.mode; > + u8 mode = chip->best_iface->timings.mode; > u8 tmode_param[ONFI_SUBFEATURE_PARAM_LEN] = { mode, }; > int ret; > > @@ -966,7 +966,7 @@ static int nand_setup_data_interface(struct nand_chip *chip, int chipnr) > > /* Change the mode on the controller side */ > ret = chip->controller->ops->setup_data_interface(chip, chipnr, > - &chip->data_interface); > + chip->best_iface); > if (ret) > return ret; > > @@ -1030,8 +1030,10 @@ int nand_choose_best_sdr_timings(struct nand_chip *chip, > ret = ops->setup_data_interface(chip, > NAND_DATA_IFACE_CHECK_ONLY, > iface); > - if (!ret) > + if (!ret) { > + chip->best_iface = iface; > return ret; > + } > > /* Fallback to slower modes */ > best_mode = iface->timings.mode; > @@ -1052,6 +1054,8 @@ int nand_choose_best_sdr_timings(struct nand_chip *chip, > break; > } > > + chip->best_iface = iface; > + > return 0; > } > > @@ -1070,14 +1074,25 @@ int nand_choose_best_sdr_timings(struct nand_chip *chip, > */ > static int nand_choose_data_interface(struct nand_chip *chip) > { > + struct nand_data_interface *iface; > + int ret; > + > if (!nand_controller_has_setup_data_iface(chip)) > return 0; > > + iface = kzalloc(sizeof(*iface), GFP_KERNEL); > + if (!iface) > + return -ENOMEM; > + > if (chip->ops.choose_data_interface) > - return chip->ops.choose_data_interface(chip, > - &chip->data_interface); > + ret = chip->ops.choose_data_interface(chip, iface); > + else > + ret = nand_choose_best_sdr_timings(chip, iface, NULL); > > - return nand_choose_best_sdr_timings(chip, &chip->data_interface, NULL); > + if (ret) > + kfree(iface); > + > + return ret; > } > > /** > @@ -2514,8 +2529,7 @@ int nand_reset(struct nand_chip *chip, int chipnr) > * nand_setup_data_interface() uses ->set/get_features() which would > * fail anyway as the parameter page is not available yet. > */ > - if (!memcmp(&chip->data_interface, nand_reset_data_iface, > - sizeof(*nand_reset_data_iface))) > + if (!chip->best_iface) > return 0; > If you assign ->best_iface for mode 0 (as done above) and keep the !chip->best_iface test that means you apply timing mode 0 twice. Not a big deal but I wanted to point it out. > ret = nand_setup_data_interface(chip, chipnr); > @@ -5252,9 +5266,6 @@ static int nand_scan_ident(struct nand_chip *chip, unsigned int maxchips, > > mutex_init(&chip->lock); > > - /* Enforce the right timings for reset/detection */ > - onfi_fill_data_interface(chip, &chip->data_interface, NAND_SDR_IFACE, 0); > - > ret = nand_dt_init(chip); > if (ret) > return ret; > @@ -6059,7 +6070,7 @@ static int nand_scan_tail(struct nand_chip *chip) > for (i = 0; i < nanddev_ntargets(&chip->base); i++) { > ret = nand_setup_data_interface(chip, i); > if (ret) > - goto err_nanddev_cleanup; > + goto err_free_data_iface; > } > > /* Check, if we should skip the bad block table scan */ > @@ -6069,10 +6080,12 @@ static int nand_scan_tail(struct nand_chip *chip) > /* Build bad block table */ > ret = nand_create_bbt(chip); > if (ret) > - goto err_nanddev_cleanup; > + goto err_free_data_iface; > > return 0; > > +err_free_data_iface: > + kfree(chip->best_iface); > > err_nanddev_cleanup: > nanddev_cleanup(&chip->base); > @@ -6166,6 +6179,9 @@ void nand_cleanup(struct nand_chip *chip) > & NAND_BBT_DYNAMICSTRUCT) > kfree(chip->badblock_pattern); > > + /* Free the data interface */ > + kfree(chip->best_iface); > + > /* Free manufacturer priv data. */ > nand_manufacturer_cleanup(chip); > > diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h > index 00557e553827..0f215faa3072 100644 > --- a/include/linux/mtd/rawnand.h > +++ b/include/linux/mtd/rawnand.h > @@ -1070,7 +1070,9 @@ struct nand_manufacturer { > * @options: Various chip options. They can partly be set to inform nand_scan > * about special functionality. See the defines for further > * explanation. > - * @data_interface: NAND interface timing information > + * @best_iface: The best NAND data interface which fits both the NAND chip and ^ configuration > + * NAND controller constraints. If unset, the default reset data > + * interface must be used. > * @bbt_erase_shift: Number of address bits in a bbt entry > * @bbt_options: Bad block table specific options. All options used here must > * come from bbm.h. By default, these options will be copied to > @@ -1117,7 +1119,7 @@ struct nand_chip { > unsigned int options; > > /* Data interface */ > - struct nand_data_interface data_interface; > + struct nand_data_interface *best_iface; Not sure why you rename this field, but if we go for a name update, I'd vote for best_iface_cfg (or something that clarifies the fact that this is the data interface configuration). > > /* Bad block information */ > unsigned int bbt_erase_shift; > @@ -1212,7 +1214,12 @@ extern const struct nand_data_interface *nand_reset_data_iface; > static inline const struct nand_sdr_timings * > nand_get_sdr_timings(struct nand_chip *chip) > { > - return nand_extract_sdr_timings(&chip->data_interface); > + const struct nand_data_interface *iface = chip->best_iface; > + > + if (!iface) > + iface = nand_reset_data_iface; > + > + return nand_extract_sdr_timings(iface); > } > > /* ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/