From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Han Xu <xhnjupt@gmail.com>, Vignesh Raghavendra <vigneshr@ti.com>,
Tudor Ambarus <Tudor.Ambarus@microchip.com>,
Richard Weinberger <richard@nod.at>,
linux-mtd@lists.infradead.org, Fabio Estevam <festevam@gmail.com>,
Lucas Stach <l.stach@pengutronix.de>
Subject: Re: [PATCH] mtd: rawnand: mxc: Move the ECC engine initialization to the right place
Date: Fri, 16 Oct 2020 19:01:49 +0200 [thread overview]
Message-ID: <20201016190149.55a3d62f@xps13> (raw)
In-Reply-To: <20201016135351.GL13710@pengutronix.de>
Hi Sascha,
Sascha Hauer <s.hauer@pengutronix.de> wrote on Fri, 16 Oct 2020
15:53:51 +0200:
> Hi Miquel,
>
> On Fri, Oct 16, 2020 at 09:49:42AM +0200, Miquel Raynal wrote:
> > No ECC initialization should happen during the host controller probe.
> >
> > Indeed, we need the probe to call nand_scan() in order to:
> > - identify the device, its capabilities and constraints (nand_scan_ident())
> > - configure the ECC engine accordingly (->attach_chip())
> > - scan its content and prepare the core (nand_scan_tail())
> >
> > Moving these lines to mxcnd_attach_chip() fixes a regression caused by
> > a previous commit supposed to clarify these steps.
> >
> > Fixes: TODO
> > Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
> > ---
> >
> > Hi Han,
> >
> > Could you please give this patch a shot? It is supposed to fix
> > the LS1043A issue we have seen in robots reports the last weeks.
>
> With this there's no longer a division by zero in the kernel, but NAND
> now fails with the following. Also I can confirm that "mtd: rawnand:
> Use the ECC framework user input parsing bits" in next breaks it, without
> this patch the driver runs well.
>
> Sascha
>
> nand: device found, Manufacturer ID: 0x20, Chip ID: 0xa1
> nand: ST Micro NAND01GR3B2CZA6
> nand: 128 MiB, SLC, erase size: 128 KiB, page size: 2048, OOB size: 64
> ------------[ cut here ]------------
> WARNING: CPU: 0 PID: 1 at drivers/mtd/nand/raw/mxc_nand.c:1390 mxc_nand_command+0xc4/0x26c
> Unimplemented command (cmd=0)
> Modules linked in:
> CPU: 0 PID: 1 Comm: swapper Not tainted 5.9.0-rc2-00020-g2e00450a5852 #20
> Hardware name: Freescale i.MX27 (Device Tree Support)
> [<c00106a4>] (unwind_backtrace) from [<c000dd08>] (show_stack+0x10/0x18)
> [<c000dd08>] (show_stack) from [<c037950c>] (dump_stack+0x20/0x2c)
> [<c037950c>] (dump_stack) from [<c001c68c>] (__warn+0xb8/0xec)
> [<c001c68c>] (__warn) from [<c001ca54>] (warn_slowpath_fmt+0x90/0xbc)
> [<c001ca54>] (warn_slowpath_fmt) from [<c0494cb8>] (mxc_nand_command+0xc4/0x26c)
> [<c0494cb8>] (mxc_nand_command) from [<c0489f50>] (nand_read_page_op+0x28c/0x300)
> [<c0489f50>] (nand_read_page_op) from [<c048a0d4>] (nand_read_page_raw+0x2c/0x6c)
> [<c048a0d4>] (nand_read_page_raw) from [<c0486b68>] (nand_read_page_swecc+0x38/0x11c)
> [<c0486b68>] (nand_read_page_swecc) from [<c0487f5c>] (nand_read_oob+0x238/0x730)
Software ECC is used, is it expected?
Can you trace rawnand_dt_init() to see what happen in the engine_type
choice?
Thanks,
Miquèl
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next prev parent reply other threads:[~2020-10-16 17:03 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-16 7:49 [PATCH] mtd: rawnand: mxc: Move the ECC engine initialization to the right place Miquel Raynal
2020-10-16 11:32 ` Fabio Estevam
2020-10-16 11:45 ` Fabio Estevam
2020-10-16 12:05 ` Miquel Raynal
2020-10-16 12:11 ` Fabio Estevam
2020-10-16 13:53 ` Sascha Hauer
2020-10-16 17:01 ` Miquel Raynal [this message]
2020-10-16 17:37 ` Fabio Estevam
2020-10-16 19:18 ` Fabio Estevam
2020-10-16 21:05 ` Miquel Raynal
2020-10-16 21:32 ` Fabio Estevam
2020-10-17 18:17 ` Miquel Raynal
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