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From: Pratyush Yadav <p.yadav@ti.com>
To: Tudor Ambarus <tudor.ambarus@microchip.com>,
	Michael Walle <michael@walle.cc>,
	Miquel Raynal <miquel.raynal@bootlin.com>,
	Richard Weinberger <richard@nod.at>,
	Vignesh Raghavendra <vigneshr@ti.com>,
	Mark Brown <broonie@kernel.org>, <linux-mtd@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>, <linux-spi@vger.kernel.org>
Cc: Pratyush Yadav <p.yadav@ti.com>
Subject: [PATCH 1/6] mtd: spi-nor: core: use 2 data bytes for template ops
Date: Fri, 7 May 2021 00:48:24 +0530	[thread overview]
Message-ID: <20210506191829.8271-2-p.yadav@ti.com> (raw)
In-Reply-To: <20210506191829.8271-1-p.yadav@ti.com>

The template ops used in spi_nor_spimem_check_pp() and
spi_nor_spimem_check_readop() currently set the data phase to 1 byte
long. This is problematic for 8D-8D-8D protocol where odd length data
phase is invalid since one cycle transfers 2 bytes and odd number of
bytes would mean half a cycle is left over. This could result in a
controller rejecting the op as "not supported" even though it actually
supports the protocol.

Change the data length to 2 bytes in these templates. One might argue
that this should only be done for 8D-8D-8D operations but when talking
about these templates, there is no functional difference between one and
two bytes, even in STR modes.

Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
---

 drivers/mtd/spi-nor/core.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
index bd2c7717eb10..5cc206b8bbf3 100644
--- a/drivers/mtd/spi-nor/core.c
+++ b/drivers/mtd/spi-nor/core.c
@@ -2143,7 +2143,7 @@ static int spi_nor_spimem_check_readop(struct spi_nor *nor,
 	struct spi_mem_op op = SPI_MEM_OP(SPI_MEM_OP_CMD(read->opcode, 0),
 					  SPI_MEM_OP_ADDR(3, 0, 0),
 					  SPI_MEM_OP_DUMMY(1, 0),
-					  SPI_MEM_OP_DATA_IN(1, NULL, 0));
+					  SPI_MEM_OP_DATA_IN(2, NULL, 0));
 
 	spi_nor_spimem_setup_op(nor, &op, read->proto);
 
@@ -2169,7 +2169,7 @@ static int spi_nor_spimem_check_pp(struct spi_nor *nor,
 	struct spi_mem_op op = SPI_MEM_OP(SPI_MEM_OP_CMD(pp->opcode, 0),
 					  SPI_MEM_OP_ADDR(3, 0, 0),
 					  SPI_MEM_OP_NO_DUMMY,
-					  SPI_MEM_OP_DATA_OUT(1, NULL, 0));
+					  SPI_MEM_OP_DATA_OUT(2, NULL, 0));
 
 	spi_nor_spimem_setup_op(nor, &op, pp->proto);
 
-- 
2.30.0


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  reply	other threads:[~2021-05-06 19:19 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-06 19:18 [PATCH 0/6] Avoid odd length/address read/writes in 8D-8D-8D mode Pratyush Yadav
2021-05-06 19:18 ` Pratyush Yadav [this message]
2021-05-06 19:18 ` [PATCH 2/6] mtd: spi-nor: spansion: write 2 bytes when disabling Octal DTR mode Pratyush Yadav
2021-05-06 19:18 ` [PATCH 3/6] mtd: spi-nor: micron-st: " Pratyush Yadav
2021-05-06 19:18 ` [PATCH 4/6] spi: spi-mem: reject partial cycle transfers in 8D-8D-8D mode Pratyush Yadav
2021-05-07 12:55   ` Mark Brown
2021-05-07 13:56     ` Pratyush Yadav
2021-05-07 15:31       ` Mark Brown
2021-05-07 15:48   ` Mark Brown
2021-05-07 16:49     ` Pratyush Yadav
2021-05-06 19:18 ` [PATCH 5/6] mtd: spi-nor: core; avoid odd length/address reads on " Pratyush Yadav
2021-05-07 15:51   ` Michael Walle
2021-05-07 18:04     ` Pratyush Yadav
2021-05-07 18:14       ` Michael Walle
2021-05-07 18:23         ` Pratyush Yadav
2021-05-06 19:18 ` [PATCH 6/6] mtd: spi-nor: core; avoid odd length/address writes in " Pratyush Yadav
2021-05-07 15:56   ` Michael Walle
2021-05-07 17:02     ` Pratyush Yadav
2021-05-07 15:50 ` [PATCH 0/6] Avoid odd length/address read/writes " Mark Brown

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