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Mon, 31 May 2021 13:24:06 -0500 Received: from DLEE110.ent.ti.com (157.170.170.21) by DLEE115.ent.ti.com (157.170.170.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2; Mon, 31 May 2021 13:24:06 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE110.ent.ti.com (157.170.170.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2 via Frontend Transport; Mon, 31 May 2021 13:24:06 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 14VIO44b058721; Mon, 31 May 2021 13:24:05 -0500 Date: Mon, 31 May 2021 23:54:04 +0530 From: Pratyush Yadav To: Chris Morgan CC: , , , , , , , , , , , , Chris Morgan Subject: Re: [PATCH v2 4/4] arm64: dts: rockchip: Enable SFC for Odroid Go Advance Message-ID: <20210531182402.7qdhubb2objdspz6@ti.com> References: <20210528170020.26219-1-macroalpha82@gmail.com> <20210528170020.26219-5-macroalpha82@gmail.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20210528170020.26219-5-macroalpha82@gmail.com> User-Agent: NeoMutt/20171215 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210531_112412_521764_BF76E80F X-CRM114-Status: GOOD ( 17.80 ) X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-mtd" Errors-To: linux-mtd-bounces+linux-mtd=archiver.kernel.org@lists.infradead.org On 28/05/21 12:00PM, Chris Morgan wrote: > From: Chris Morgan > > This enables the Rockchip Serial Flash Controller for the Odroid Go > Advance. Note that while the attached SPI NOR flash and the controller > both support quad read mode, only 2 of the required 4 pins are present. > The rx and tx bus width is set to 2 for this reason. > > Signed-off-by: Chris Morgan > --- > .../boot/dts/rockchip/rk3326-odroid-go2.dts | 16 ++++++++++++++++ > 1 file changed, 16 insertions(+) > > diff --git a/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts b/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts > index 49c97f76df77..a72506d7c6ee 100644 > --- a/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts > +++ b/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts > @@ -484,6 +484,22 @@ &sdmmc { > status = "okay"; > }; > > +&sfc { > + #address-cells = <1>; > + #size-cells = <0>; > + pinctrl-names = "default"; > + pinctrl-0 = <&sfc_clk &sfc_cs &sfc_bus2>; > + status = "okay"; > + > + nor_flash: xt25f128b@0 { > + reg = <0>; > + compatible = "xtx,xt25f128b","jedec,spi-nor"; Is the generic "jedec,spi-nor" compatible not enough? I think these flash manufacturer specific compatibles are there because of legacy reasons and should be avoided. Try to see if just "jedec,spi-nor" does the trick. > + spi-rx-bus-width = <2>; > + spi-tx-bus-width = <2>; > + spi-max-frequency = <108000000>; > + }; > +}; > + > &tsadc { > status = "okay"; > }; > -- > 2.25.1 > -- Regards, Pratyush Yadav Texas Instruments Inc. ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/