From: Chris Morgan <macroalpha82@gmail.com>
To: linux-spi@vger.kernel.org
Cc: jon.lin@rock-chips.com, broonie@kernel.org, robh+dt@kernel.org,
heiko@sntech.de, jbx6244@gmail.com, hjc@rock-chips.com,
yifeng.zhao@rock-chips.com, sugar.zhang@rock-chips.com,
linux-rockchip@lists.infradead.org,
linux-mtd@lists.infradead.org, p.yadav@ti.com,
Chris Morgan <macromorgan@hotmail.com>
Subject: [RFC v4 7/8] arm64: dts: rockchip: Add SFC to RK3308
Date: Fri, 4 Jun 2021 10:10:54 -0500 [thread overview]
Message-ID: <20210604151055.28636-8-macroalpha82@gmail.com> (raw)
In-Reply-To: <20210604151055.28636-1-macroalpha82@gmail.com>
From: Chris Morgan <macromorgan@hotmail.com>
Add a devicetree entry for the Rockchip SFC for the RK3308 SOC.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
---
arch/arm64/boot/dts/rockchip/rk3308.dtsi | 37 ++++++++++++++++++++++++
1 file changed, 37 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
index 0c5fa9801e6f..2d922b1d51d5 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
@@ -637,6 +637,17 @@ nfc: nand-controller@ff4b0000 {
status = "disabled";
};
+ sfc: spi@ff4c0000 {
+ compatible = "rockchip,rk3308-sfc", "rockchip,rk3036-sfc";
+ reg = <0x0 0xff4c0000 0x0 0x4000>;
+ interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru HCLK_SFC>, <&cru SCLK_SFC>;
+ clock-names = "ahb", "sfc";
+ pinctrl-0 = <&sfc_clk &sfc_cs0 &sfc_bus4>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+
cru: clock-controller@ff500000 {
compatible = "rockchip,rk3308-cru";
reg = <0x0 0xff500000 0x0 0x1000>;
@@ -910,6 +921,32 @@ flash_bus8: flash-bus8 {
};
};
+ serial_flash {
+ sfc_bus4: sfc-bus4 {
+ rockchip,pins =
+ <3 RK_PA0 3 &pcfg_pull_none>,
+ <3 RK_PA1 3 &pcfg_pull_none>,
+ <3 RK_PA2 3 &pcfg_pull_none>,
+ <3 RK_PA3 3 &pcfg_pull_none>;
+ };
+
+ sfc_bus2: sfc-bus2 {
+ rockchip,pins =
+ <3 RK_PA0 3 &pcfg_pull_none>,
+ <3 RK_PA1 3 &pcfg_pull_none>;
+ };
+
+ sfc_cs0: sfc-cs0 {
+ rockchip,pins =
+ <3 RK_PA4 3 &pcfg_pull_none>;
+ };
+
+ sfc_clk: sfc-clk {
+ rockchip,pins =
+ <3 RK_PA5 3 &pcfg_pull_none>;
+ };
+ };
+
gmac {
rmii_pins: rmii-pins {
rockchip,pins =
--
2.25.1
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next prev parent reply other threads:[~2021-06-04 15:16 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-04 15:10 [RFC v4 0/8] Add Rockchip SFC(serial flash controller) support Chris Morgan
2021-06-04 15:10 ` [RFC v4 1/8] dt-bindings: rockchip-sfc: Bindings for Rockchip serial flash controller Chris Morgan
2021-06-04 15:31 ` Rob Herring
2021-06-04 15:44 ` Chris Morgan
2021-06-04 15:10 ` [RFC v4 2/8] spi: rockchip-sfc: add rockchip " Chris Morgan
2021-06-04 15:10 ` [RFC v4 3/8] arm64: dts: rockchip: Add SFC to PX30 Chris Morgan
2021-06-04 15:10 ` [RFC v4 4/8] clk: rockchip: Add support for hclk_sfc on rk3036 Chris Morgan
2021-06-04 15:10 ` [RFC v4 5/8] arm: dts: rockchip: Add SFC to RK3036 Chris Morgan
2021-06-04 15:10 ` [RFC v4 6/8] arm: dts: rockchip: Add SFC to RV1108 Chris Morgan
2021-06-04 15:10 ` Chris Morgan [this message]
2021-06-04 15:10 ` [RFC v4 8/8] arm64: dts: rockchip: Enable SFC for Odroid Go Advance Chris Morgan
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