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Tue, 13 Jul 2021 08:06:23 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE108.ent.ti.com (10.64.6.29) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2 via Frontend Transport; Tue, 13 Jul 2021 08:06:23 -0500 Received: from LT5CD112GSQZ.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 16DD5daI109825; Tue, 13 Jul 2021 08:06:19 -0500 From: Apurva Nandan To: Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Mark Brown , Patrice Chotard , Boris Brezillon , , , CC: Apurva Nandan , Pratyush Yadav Subject: [PATCH 08/13] mtd: spinand: Reject 8D-8D-8D op_templates if octal_dtr_enale() is missing in manufacturer_op Date: Tue, 13 Jul 2021 13:05:33 +0000 Message-ID: <20210713130538.646-9-a-nandan@ti.com> X-Mailer: git-send-email 2.31.1.windows.1 In-Reply-To: <20210713130538.646-1-a-nandan@ti.com> References: <20210713130538.646-1-a-nandan@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210713_060629_558161_470B7E9A X-CRM114-Status: GOOD ( 12.31 ) X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-mtd" Errors-To: linux-mtd-bounces+linux-mtd=archiver.kernel.org@lists.infradead.org The SPI NAND core doesn't know how to switch the flash to Octal DTR mode (i.e. which operations to perform). If the manufacturer hasn't implemented the octal_dtr_enable() manufacturer_op, the SPI NAND core wouldn't be able to switch to 8D-8D-8D mode and will also not be able to run in 1S-1S-1S mode due to already selected 8D-8D-8D read/write cache op_templates. So, avoid choosing a Octal DTR SPI op_template for read_cache, write_cache and update_cache operations, if the manufacturer_op octal_dtr_enable() is missing. Signed-off-by: Apurva Nandan --- drivers/mtd/nand/spi/core.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c index 19d8affac058..8711e887b795 100644 --- a/drivers/mtd/nand/spi/core.c +++ b/drivers/mtd/nand/spi/core.c @@ -1028,6 +1028,8 @@ static int spinand_manufacturer_match(struct spinand_device *spinand, if (id[0] != manufacturer->id) continue; + spinand->manufacturer = manufacturer; + ret = spinand_match_and_init(spinand, manufacturer->chips, manufacturer->nchips, @@ -1035,7 +1037,6 @@ static int spinand_manufacturer_match(struct spinand_device *spinand, if (ret < 0) continue; - spinand->manufacturer = manufacturer; return 0; } return -ENOTSUPP; @@ -1097,6 +1098,10 @@ spinand_select_op_variant(struct spinand_device *spinand, unsigned int nbytes; int ret; + if (spinand_op_is_octal_dtr(&op) && + !spinand->manufacturer->ops->octal_dtr_enable) + continue; + nbytes = nanddev_per_page_oobsize(nand) + nanddev_page_size(nand); -- 2.17.1 ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/