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Fri, 10 Sep 2021 14:14:35 -0700 (PDT) From: Mauro Lima To: linux-mtd@lists.infradead.org Cc: daniel.gutson@eclypsium.com, richard@hughsie.com, tudor.ambarus@microchip.com, miquel.raynal@bootlin.com, richard@nod.at, vigneshr@ti.com, mika.westerberg@linux.intel.com, mauro.lima@eclypsium.com Subject: [PATCH 4/4] mtd: intel-spi: add read only stubs Date: Fri, 10 Sep 2021 18:13:48 -0300 Message-Id: <20210910211348.642103-5-mauro.lima@eclypsium.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210910211348.642103-1-mauro.lima@eclypsium.com> References: <20210910211348.642103-1-mauro.lima@eclypsium.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210910_141437_135786_2F4AB577 X-CRM114-Status: GOOD ( 19.61 ) X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-mtd" Errors-To: linux-mtd-bounces+linux-mtd=archiver.kernel.org@lists.infradead.org Add read only stub functions (as __weak) in read only mode, so they can be override on read-write mode. Remove the (DANGEROUS) tag in read only mode. Add write mode option if pci or platform driver is selected. Change the intel-spi recepie to be able to build read only or read-write mode. Suggested-by: Daniel Gutson Suggested-by: Richard Hughes Signed-off-by: Mauro Lima --- drivers/mtd/spi-nor/controllers/Kconfig | 50 +++++++++++++------ drivers/mtd/spi-nor/controllers/Makefile | 4 +- .../mtd/spi-nor/controllers/intel-spi-ro.c | 50 +++++++++++++++++++ .../mtd/spi-nor/controllers/intel-spi-rw.h | 1 + 4 files changed, 88 insertions(+), 17 deletions(-) create mode 100644 drivers/mtd/spi-nor/controllers/intel-spi-ro.c diff --git a/drivers/mtd/spi-nor/controllers/Kconfig b/drivers/mtd/spi-nor/controllers/Kconfig index 5c0e0ec2e6d1..c4f2505c9302 100644 --- a/drivers/mtd/spi-nor/controllers/Kconfig +++ b/drivers/mtd/spi-nor/controllers/Kconfig @@ -30,35 +30,53 @@ config SPI_NXP_SPIFI config SPI_INTEL_SPI tristate +config SPI_INTEL_SPI_RO + bool + default y if !SPI_INTEL_SPI_W + select SPI_INTEL_SPI + config SPI_INTEL_SPI_PCI - tristate "Intel PCH/PCU SPI flash PCI driver (DANGEROUS)" + tristate + +config SPI_INTEL_SPI_PLATFORM + tristate + +config SPI_INTEL_SPI_PCI_RO + tristate "Intel PCH/PCU SPI flash PCI driver" depends on X86 && PCI - select SPI_INTEL_SPI + select SPI_INTEL_SPI_RO + select SPI_INTEL_SPI_PCI help This enables PCI support for the Intel PCH/PCU SPI controller in - master mode. This controller is present in modern Intel hardware - and is used to hold BIOS and other persistent settings. Using - this driver it is possible to upgrade BIOS directly from Linux. - - Say N here unless you know what you are doing. Overwriting the - SPI flash may render the system unbootable. + read only mode. This controller is present in modern Intel + hardware and is used to hold BIOS and other persistent settings. To compile this driver as a module, choose M here: the module will be called intel-spi-pci. -config SPI_INTEL_SPI_PLATFORM - tristate "Intel PCH/PCU SPI flash platform driver (DANGEROUS)" +config SPI_INTEL_SPI_PLATFORM_RO + tristate "Intel PCH/PCU SPI flash platform driver" depends on X86 + select SPI_INTEL_SPI_RO + select SPI_INTEL_SPI_PLATFORM + help + This enables PCI support for the Intel PCH/PCU SPI controller in + read only mode. This controller is present in modern Intel + hardware and is used to hold BIOS and other persistent settings. + + To compile this driver as a module, choose M here: the module + will be called intel-spi-pci. + +config SPI_INTEL_SPI_W + bool "Enable Intel PCH/PCU SPI controller in write mode (DANGEROUS)" select SPI_INTEL_SPI + default n if SPI_INTEL_SPI_PCI || SPI_INTEL_SPI_PLATFORM + depends on SPI_INTEL_SPI_PCI || SPI_INTEL_SPI_PLATFORM help - This enables platform support for the Intel PCH/PCU SPI - controller in master mode. This controller is present in modern - Intel hardware and is used to hold BIOS and other persistent - settings. Using this driver it is possible to upgrade BIOS + This enables {PCI|PLATFORM} support for the Intel PCH/PCU controller + in master mode. Enabling this mode it is possible to upgrade BIOS directly from Linux. Say N here unless you know what you are doing. Overwriting the SPI flash may render the system unbootable. - To compile this driver as a module, choose M here: the module - will be called intel-spi-platform. diff --git a/drivers/mtd/spi-nor/controllers/Makefile b/drivers/mtd/spi-nor/controllers/Makefile index 1933a7c2c30b..a4faeace67fc 100644 --- a/drivers/mtd/spi-nor/controllers/Makefile +++ b/drivers/mtd/spi-nor/controllers/Makefile @@ -3,6 +3,8 @@ obj-$(CONFIG_SPI_ASPEED_SMC) += aspeed-smc.o obj-$(CONFIG_SPI_HISI_SFC) += hisi-sfc.o obj-$(CONFIG_SPI_NXP_SPIFI) += nxp-spifi.o obj-$(CONFIG_SPI_INTEL_SPI) += intel-spi.o -intel-spi-y := intel-spi-base.o intel-spi-w.o +intel-spi-y := intel-spi-base.o +intel-spi-$(CONFIG_SPI_INTEL_SPI_RO) += intel-spi-ro.o +intel-spi-$(CONFIG_SPI_INTEL_SPI_W) += intel-spi-w.o obj-$(CONFIG_SPI_INTEL_SPI_PCI) += intel-spi-pci.o obj-$(CONFIG_SPI_INTEL_SPI_PLATFORM) += intel-spi-platform.o diff --git a/drivers/mtd/spi-nor/controllers/intel-spi-ro.c b/drivers/mtd/spi-nor/controllers/intel-spi-ro.c new file mode 100644 index 000000000000..4c52c2bb65ef --- /dev/null +++ b/drivers/mtd/spi-nor/controllers/intel-spi-ro.c @@ -0,0 +1,50 @@ +// SPDX-License-Identifier: GPL-2.0-only + +#include "intel-spi-rw.h" + +bool __weak is_write_enabled(void) +{ + return false; +} + +int __weak __intel_spi_erase(struct spi_nor *nor, loff_t offs) +{ + return -EINVAL; +} + +ssize_t __weak __intel_spi_write(struct spi_nor *nor, loff_t to, size_t len, + const u_char *write_buf) +{ + return -EINVAL; +} + +int __weak __intel_spi_write_reg(struct spi_nor *nor, u8 opcode, const u8 *buf, + size_t len) +{ + return -EINVAL; +} + +/* We don't need erase op */ +int __weak __configure_lvscc_uvscc(struct intel_spi *ispi) +{ + ispi->erase_64k = false; + return 0; +} + +void __weak __intel_bxt_rw_config(struct intel_spi *ispi) +{ + (void)ispi; +} + +void __weak __intel_byt_rw_config(struct intel_spi *ispi) +{ + (void)ispi; +} + +int __weak __intel_sw_cycle_write(struct intel_spi *ispi, int optype, u8 atomic_preopcode) +{ + /* not supported op */ + return -EINVAL; +} + +MODULE_LICENSE("GPL v2"); diff --git a/drivers/mtd/spi-nor/controllers/intel-spi-rw.h b/drivers/mtd/spi-nor/controllers/intel-spi-rw.h index 46c6461a8a7b..b682db03f17a 100644 --- a/drivers/mtd/spi-nor/controllers/intel-spi-rw.h +++ b/drivers/mtd/spi-nor/controllers/intel-spi-rw.h @@ -10,6 +10,7 @@ int intel_spi_sw_cycle(struct intel_spi *ispi, u8 opcode, size_t len, int optype int intel_spi_wait_hw_busy(struct intel_spi *ispi); int intel_spi_hw_cycle(struct intel_spi *ispi, u8 opcode, size_t len); +void check_mode(void); bool is_write_enabled(void); int __intel_spi_erase(struct spi_nor *nor, loff_t offs); ssize_t __intel_spi_write(struct spi_nor *nor, loff_t to, size_t len, const u_char *write_buf); -- 2.31.1 -- This e-mail and any attachments may contain information that is privileged, confidential, and/or exempt from disclosure under applicable law. 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