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From: Tudor Ambarus <tudor.ambarus@microchip.com>
To: <michael@walle.cc>, <vigneshr@ti.com>, <p.yadav@ti.com>
Cc: macromorgan@hotmail.com, jaimeliao@mxic.com.tw,
	Tudor Ambarus <tudor.ambarus@microchip.com>,
	richard@nod.at, esben@geanix.com, linux@rasmusvillemoes.dk,
	knaerzche@gmail.com, nicolas.ferre@microchip.com,
	linux-mtd@lists.infradead.org,
	linux-arm-kernel@lists.infradead.org, code@reto-schneider.ch,
	miquel.raynal@bootlin.com, heiko.thiery@gmail.com, sr@denx.de,
	mail@david-bauer.net, zhengxunli@mxic.com.tw
Subject: [PATCH v4 06/13] mtd: spi-nor: Introduce spi_nor_init_flags()
Date: Mon, 22 Nov 2021 11:50:13 +0200	[thread overview]
Message-ID: <20211122095020.393346-7-tudor.ambarus@microchip.com> (raw)
In-Reply-To: <20211122095020.393346-1-tudor.ambarus@microchip.com>

Used to initialize the NOR flags for settings that are not defined
in the JESD216 SFDP standard, thus can not be retrieved when parsing
SFDP.
This moves the setting of SNOR_F_READY_XSR_RDY and SNOR_F_HAS_LOCK
late in the init call, without any functional change expected.
The rest of the flags were already set after the spi_nor_init_params().

Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
---
v4: rename method to spi_nor_init_flags

 drivers/mtd/spi-nor/core.c | 89 ++++++++++++++++++++++----------------
 1 file changed, 51 insertions(+), 38 deletions(-)

diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
index a2d09b722fed..14f92d105878 100644
--- a/drivers/mtd/spi-nor/core.c
+++ b/drivers/mtd/spi-nor/core.c
@@ -2643,6 +2643,55 @@ static void spi_nor_info_init_params(struct spi_nor *nor)
 	spi_nor_init_uniform_erase_map(map, erase_mask, params->size);
 }
 
+/**
+ * spi_nor_init_flags() - Initialize NOR flags for settings that are not defined
+ * in the JESD216 SFDP standard, thus can not be retrieved when parsing SFDP.
+ * @nor:	pointer to a 'struct spi_nor'
+ */
+static void spi_nor_init_flags(struct spi_nor *nor)
+{
+	struct device_node *np = spi_nor_get_flash_node(nor);
+	const u16 flags = nor->info->flags;
+
+	if (of_property_read_bool(np, "broken-flash-reset"))
+		nor->flags |= SNOR_F_BROKEN_RESET;
+
+	if (flags & SPI_NOR_SWP_IS_VOLATILE)
+		nor->flags |= SNOR_F_SWP_IS_VOLATILE;
+
+	if (flags & SPI_NOR_HAS_LOCK)
+		nor->flags |= SNOR_F_HAS_LOCK;
+
+	if (flags & SPI_NOR_HAS_TB) {
+		nor->flags |= SNOR_F_HAS_SR_TB;
+		if (flags & SPI_NOR_TB_SR_BIT6)
+			nor->flags |= SNOR_F_HAS_SR_TB_BIT6;
+	}
+
+	if (flags & SPI_NOR_4BIT_BP) {
+		nor->flags |= SNOR_F_HAS_4BIT_BP;
+		if (flags & SPI_NOR_BP3_SR_BIT6)
+			nor->flags |= SNOR_F_HAS_SR_BP3_BIT6;
+	}
+
+	if (flags & NO_CHIP_ERASE)
+		nor->flags |= SNOR_F_NO_OP_CHIP_ERASE;
+
+	if (flags & USE_CLSR)
+		nor->flags |= SNOR_F_USE_CLSR;
+
+	if (flags & USE_FSR)
+		nor->flags |= SNOR_F_USE_FSR;
+
+	/*
+	 * Make sure the XSR_RDY flag is set before calling
+	 * spi_nor_wait_till_ready(). Xilinx S3AN share MFR
+	 * with Atmel SPI NOR.
+	 */
+	if (flags & SPI_NOR_XSR_RDY)
+		nor->flags |=  SNOR_F_READY_XSR_RDY;
+}
+
 /**
  * spi_nor_late_init_params() - Late initialization of default flash parameters.
  * @nor:	pointer to a 'struct spi_nor'
@@ -2660,6 +2709,8 @@ static void spi_nor_late_init_params(struct spi_nor *nor)
 	if (nor->info->fixups && nor->info->fixups->late_init)
 		nor->info->fixups->late_init(nor);
 
+	spi_nor_init_flags(nor);
+
 	/*
 	 * NOR protection support. When locking_ops are not provided, we pick
 	 * the default ones.
@@ -3094,10 +3145,8 @@ int spi_nor_scan(struct spi_nor *nor, const char *name,
 	const struct flash_info *info;
 	struct device *dev = nor->dev;
 	struct mtd_info *mtd = &nor->mtd;
-	struct device_node *np = spi_nor_get_flash_node(nor);
 	int ret;
 	int i;
-	u16 flags;
 	u8 fixup_flags;
 
 	ret = spi_nor_check(nor);
@@ -3128,52 +3177,16 @@ int spi_nor_scan(struct spi_nor *nor, const char *name,
 		return PTR_ERR(info);
 
 	nor->info = info;
-	flags = info->flags;
 
 	spi_nor_debugfs_init(nor, info);
 
 	mutex_init(&nor->lock);
 
-	/*
-	 * Make sure the XSR_RDY flag is set before calling
-	 * spi_nor_wait_till_ready(). Xilinx S3AN share MFR
-	 * with Atmel SPI NOR.
-	 */
-	if (flags & SPI_NOR_XSR_RDY)
-		nor->flags |=  SNOR_F_READY_XSR_RDY;
-
-	if (flags & SPI_NOR_HAS_LOCK)
-		nor->flags |= SNOR_F_HAS_LOCK;
-
 	/* Init flash parameters based on flash_info struct and SFDP */
 	ret = spi_nor_init_params(nor);
 	if (ret)
 		return ret;
 
-	if (flags & USE_FSR)
-		nor->flags |= SNOR_F_USE_FSR;
-	if (flags & SPI_NOR_HAS_TB) {
-		nor->flags |= SNOR_F_HAS_SR_TB;
-		if (flags & SPI_NOR_TB_SR_BIT6)
-			nor->flags |= SNOR_F_HAS_SR_TB_BIT6;
-	}
-
-	if (flags & NO_CHIP_ERASE)
-		nor->flags |= SNOR_F_NO_OP_CHIP_ERASE;
-	if (flags & USE_CLSR)
-		nor->flags |= SNOR_F_USE_CLSR;
-	if (flags & SPI_NOR_SWP_IS_VOLATILE)
-		nor->flags |= SNOR_F_SWP_IS_VOLATILE;
-
-	if (flags & SPI_NOR_4BIT_BP) {
-		nor->flags |= SNOR_F_HAS_4BIT_BP;
-		if (flags & SPI_NOR_BP3_SR_BIT6)
-			nor->flags |= SNOR_F_HAS_SR_BP3_BIT6;
-	}
-
-	if (of_property_read_bool(np, "broken-flash-reset"))
-		nor->flags |= SNOR_F_BROKEN_RESET;
-
 	/*
 	 * Configure the SPI memory:
 	 * - select op codes for (Fast) Read, Page Program and Sector Erase.
-- 
2.25.1


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  parent reply	other threads:[~2021-11-22 10:22 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-11-22  9:50 [PATCH v4 00/13] mtd: spi-nor: Clean params init Tudor Ambarus
2021-11-22  9:50 ` [PATCH v4 01/13] mtd: spi-nor: core: Don't use mtd_info in the NOR's probe sequence of calls Tudor Ambarus
2021-11-22 18:28   ` Michael Walle
2021-11-30  9:56   ` Pratyush Yadav
2021-12-03 12:03     ` Tudor.Ambarus
2021-11-22  9:50 ` [PATCH v4 02/13] mtd: spi-nor: Introduce spi_nor_set_mtd_info() Tudor Ambarus
2021-12-02  9:19   ` Pratyush Yadav
2021-12-03 12:03     ` Tudor.Ambarus
2021-11-22  9:50 ` [PATCH v4 03/13] mtd: spi-nor: core: Call spi_nor_post_sfdp_fixups() only when SFDP is defined Tudor Ambarus
2021-12-02  9:31   ` Pratyush Yadav
2021-11-22  9:50 ` [PATCH v4 04/13] mtd: spi-nor: core: Introduce flash_info mfr_flags Tudor Ambarus
2021-11-22 18:34   ` Michael Walle
2021-11-23  6:43     ` Tudor.Ambarus
2021-12-02  9:32   ` Pratyush Yadav
2021-11-22  9:50 ` [PATCH v4 05/13] mtd: spi-nor: Rework the flash_info flags Tudor Ambarus
2021-12-02 10:01   ` Pratyush Yadav
2021-11-22  9:50 ` Tudor Ambarus [this message]
2021-11-22  9:50 ` [PATCH v4 07/13] mtd: spi-nor: Introduce spi_nor_init_fixup_flags() Tudor Ambarus
2021-11-22  9:50 ` [PATCH v4 08/13] mtd: spi-nor: core: Init all flash parameters based on SFDP where possible Tudor Ambarus
2021-11-22  9:50 ` [PATCH v4 09/13] mtd: spi-nor: core: Move spi_nor_set_addr_width() in spi_nor_setup() Tudor Ambarus
2021-11-22  9:50 ` [PATCH v4 10/13] mtd: spi-nor: winbond: w25q256jvm: Init flash based on SFDP Tudor Ambarus
2021-11-22  9:50 ` [PATCH v4 11/13] mtd: spi-nor: spansion: s25fl256s0: Skip SFDP parsing Tudor Ambarus
2021-11-22  9:50 ` [PATCH v4 12/13] mtd: spi-nor: gigadevice: gd25q256: Init flash based on SFDP Tudor Ambarus
2021-11-22 18:19   ` Michael Walle
2021-11-22  9:50 ` [PATCH v4 13/13] mtd: spi-nor: issi: is25lp256: " Tudor Ambarus

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