Re: [RFC,v3 4/5] arm64: dts: add snfi node for spi nand

Miquel Raynal
2021-11-09T11:36:28Z

Hi Xiangsheng,

xiangsheng.hou@mediatek.com wrote on Fri, 22 Oct 2021 10:40:20 +0800:

> Signed-off-by: Xiangsheng Hou <xiangsheng.hou@mediatek.com>

You miss a commit message otherwise the content looks good to me.

> ---
> arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts | 18 ++++++++++++++++++
> arch/arm64/boot/dts/mediatek/mt7622.dtsi | 13 +++++++++++++
> 2 files changed, 31 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts b/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
> index f2dc850010f1..f4ba86c451fc 100644
> --- a/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
> +++ b/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
> @@ -223,6 +223,24 @@ &nandc {
> status = "disabled";
> };
>
> +&snfi {
> + pinctrl-names = "default";
> + /* pin shared with spic */
> + pinctrl-0 = <&snfi_pins>;
> + nand-ecc-engine = <&bch>;
> + status = "disabled";
> +
> + spi_nand@0 {
> + compatible = "spi-nand";
> + reg = <0>;
> + spi-max-frequency = <104000000>;
> + spi-tx-bus-width = <4>;
> + spi-rx-bus-width = <4>;
> + nand-ecc-engine = <&snfi>;
> + nand-ecc-placement = "interleaved";
> + };
> +};
> +
> &nor_flash {
> pinctrl-names = "default";
> pinctrl-0 = <&spi_nor_pins>;
> diff --git a/arch/arm64/boot/dts/mediatek/mt7622.dtsi b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
> index 890a942ec608..0525e4de5ec0 100644
> --- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
> @@ -545,6 +545,19 @@ nandc: nfi@1100d000 {
> status = "disabled";
> };
>
> + snfi: spi@1100d000 {
> + compatible = "mediatek,mt7622-snfi";
> + reg = <0 0x1100D000 0 0x1000>;
> + interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_LOW>;
> + clocks = <&infracfg_ao CK_INFRA_NFI1_CK>,
> + <&infracfg_ao CK_INFRA_SPINFI1_CK>,
> + <&infracfg_ao CK_INFRA_NFI_HCK_CK>;
> + clock-names = "nfi_clk", "snfi_clk", "hclk";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
> +
> bch: ecc@1100e000 {
> compatible = "mediatek,mt7622-ecc";
> reg = <0 0x1100e000 0 0x1000>;

Thanks,
Miquèl