Re: [PATCH v3 2/3] spi: dt-bindings: Describe stacked/parallel memories modes

Miquel Raynal
2021-12-10T20:08:23Z

Hi Rob,

robh@kernel.org wrote on Mon, 6 Dec 2021 15:22:02 -0600:

> On Mon, Dec 06, 2021 at 10:59:20AM +0100, Miquel Raynal wrote:
> > Describe two new memories modes:
> > - A stacked mode when the bus is common but the address space extended
> > with an additinals wires.
> > - A parallel mode with parallel busses accessing parallel flashes where
> > the data is spread.
> >
> > Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
> > ---
> > .../bindings/spi/spi-peripheral-props.yaml | 21 +++++++++++++++++++
> > 1 file changed, 21 insertions(+)
>
> Reviewed-by: Rob Herring <robh@kernel.org>

I am sending a new version of this series so that I can get feedback on
other way of describing the flashes, so I'll drop your tag because I'll
need you to re-check that I'm not doing anything silly (it took me a
while to understand the array vs. matrix logic).

Thanks,
Miquèl