Re: Make NAND_BBT_NO_OOB_BBM configurable or let the gpmi driver decide?

From: Han Xu <han.xu@nxp.com>
To: "Daniel Glöckner" <dg@emlix.com>
Cc: linux-mtd@lists.infradead.org,
	"Lothar Waßmann" <LW@KARO-electronics.de>,
	"Brian Norris" <computersforpeace@gmail.com>
Subject: Re: Make NAND_BBT_NO_OOB_BBM configurable or let the gpmi driver decide?
Date: Tue, 22 Feb 2022 16:02:35 -0600	[thread overview]
Message-ID: <20220222220235.pyvhaiieimf7uv74@umbrella> (raw)
In-Reply-To: <79beb2ef-7336-f067-5418-3fe62aa928d2@emlix.com>

On 22/02/21 08:00PM, Daniel Glöckner wrote:
> Hi,
> 
> we are using UBI on a NAND flash with BBT and have recently observed
> bad blocks where nand_markbad_bbm returns an error. Since that error is
> returned by nand_block_markbad_lowlevel even when marking the block in
> the BBT succeeds, UBI goes into read-only mode. We would therefore like
> to set NAND_BBT_NO_OOB_BBM.

Could you please describe more details about what kind of error, how to
reproduce it and on which kernel version?

> 
> Unfortunately there is no device tree property for this flag. Also we
> internally disagree if this should be configurable on our platform at
> all. We are using an i.MX6 that needs to relocate the bad block marker
> to a different byte within the page because of its ECC layout.
> 
> In 2014 Lothar already submitted a patch to add a nand-no-oob-bbm device
> tree property that got rejected:
> https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatchwork.kernel.org%2Fproject%2Flinux-arm-kernel%2Fpatch%2F1402579245-13377-5-git-send-email-LW%40KARO-electronics.de%2F&amp;data=04%7C01%7Chan.xu%40nxp.com%7Cda5e4832940349710a3008d9f56c78ac%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C637810668500447823%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000&amp;sdata=zyQ%2B3IlnrestiToyJjPvOsZ9cn3Dfdr%2Fcn8dW30bTaQ%3D&amp;reserved=0
> Brian suggested back then to tie this behavior to the non-standard
> fsl,no-blockmark-swap property because the marker becomes completely
> useless when it stays at the same position as data bytes in good blocks.
> 
> So which solution would have the highest chance of being accepted as a
> patch? Introducing a device tree property for NAND_BBT_NO_OOB_BBM, using
> fsl,no-blockmark-swap, or setting NAND_BBT_NO_OOB_BBM for all boards
> inside the i.MX gpmi driver when there is a BBT? Or maybe renaming
> fsl,no-blockmark-swap to nand-no-oob-bbm (with a transition phase)?
> 
> Best regards,
> 
>   Daniel

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