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From: Michael Walle <michael@walle.cc>
To: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org
Cc: Tudor Ambarus <tudor.ambarus@microchip.com>,
	Pratyush Yadav <p.yadav@ti.com>,
	Miquel Raynal <miquel.raynal@bootlin.com>,
	Richard Weinberger <richard@nod.at>,
	Vignesh Raghavendra <vigneshr@ti.com>,
	yaliang.wang@windriver.com, Michael Walle <michael@walle.cc>
Subject: [PATCH v5 29/32] mtd: spi-nor: spansion: convert USE_CLSR to a manufacturer flag
Date: Wed, 23 Feb 2022 14:43:55 +0100	[thread overview]
Message-ID: <20220223134358.1914798-30-michael@walle.cc> (raw)
In-Reply-To: <20220223134358.1914798-1-michael@walle.cc>

Now that all functions using that flag are local to the spansion module,
we can convert the flag to a manufacturer one.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
Tested-by: Pratyush Yadav <p.yadav@ti.com> # on mt35xu512aba, s28hs512t
---
 drivers/mtd/spi-nor/core.c     |  3 --
 drivers/mtd/spi-nor/core.h     |  3 --
 drivers/mtd/spi-nor/spansion.c | 55 +++++++++++++++++++++-------------
 3 files changed, 34 insertions(+), 27 deletions(-)

diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
index e2b8b0a438ce..f5a2f37d140e 100644
--- a/drivers/mtd/spi-nor/core.c
+++ b/drivers/mtd/spi-nor/core.c
@@ -2447,9 +2447,6 @@ static void spi_nor_init_flags(struct spi_nor *nor)
 
 	if (flags & NO_CHIP_ERASE)
 		nor->flags |= SNOR_F_NO_OP_CHIP_ERASE;
-
-	if (flags & USE_CLSR)
-		nor->flags |= SNOR_F_USE_CLSR;
 }
 
 /**
diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h
index a02bf54289fb..2130a96e2044 100644
--- a/drivers/mtd/spi-nor/core.h
+++ b/drivers/mtd/spi-nor/core.h
@@ -14,7 +14,6 @@
 enum spi_nor_option_flags {
 	SNOR_F_HAS_SR_TB	= BIT(1),
 	SNOR_F_NO_OP_CHIP_ERASE	= BIT(2),
-	SNOR_F_USE_CLSR		= BIT(4),
 	SNOR_F_BROKEN_RESET	= BIT(5),
 	SNOR_F_4B_OPCODES	= BIT(6),
 	SNOR_F_HAS_4BAIT	= BIT(7),
@@ -347,7 +346,6 @@ struct spi_nor_fixups {
  *   SPI_NOR_NO_ERASE:        no erase command needed.
  *   NO_CHIP_ERASE:           chip does not support chip erase.
  *   SPI_NOR_NO_FR:           can't do fastread.
- *   USE_CLSR:                use CLSR command.
  *
  * @no_sfdp_flags:  flags that indicate support that can be discovered via SFDP.
  *                  Used when SFDP tables are not defined in the flash. These
@@ -398,7 +396,6 @@ struct flash_info {
 #define SPI_NOR_NO_ERASE		BIT(6)
 #define NO_CHIP_ERASE			BIT(7)
 #define SPI_NOR_NO_FR			BIT(8)
-#define USE_CLSR			BIT(9)
 
 	u8 no_sfdp_flags;
 #define SPI_NOR_SKIP_SFDP		BIT(0)
diff --git a/drivers/mtd/spi-nor/spansion.c b/drivers/mtd/spi-nor/spansion.c
index dbafe97c2636..32d3301ce385 100644
--- a/drivers/mtd/spi-nor/spansion.c
+++ b/drivers/mtd/spi-nor/spansion.c
@@ -8,6 +8,9 @@
 
 #include "core.h"
 
+/* flash_info mfr_flag. Used to clear sticky prorietary SR bits. */
+#define USE_CLSR	BIT(0)
+
 #define SPINOR_OP_CLSR		0x30	/* Clear status register 1 */
 #define SPINOR_OP_RD_ANY_REG			0x65	/* Read any register */
 #define SPINOR_OP_WR_ANY_REG			0x71	/* Write any register */
@@ -212,43 +215,53 @@ static const struct flash_info spansion_nor_parts[] = {
 	{ "s25sl064p",  INFO(0x010216, 0x4d00,  64 * 1024, 128)
 		NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
 	{ "s25fl128s0", INFO6(0x012018, 0x4d0080, 256 * 1024, 64)
-		FLAGS(USE_CLSR)
-		NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+		NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)
+		MFR_FLAGS(USE_CLSR)
+	},
 	{ "s25fl128s1", INFO6(0x012018, 0x4d0180, 64 * 1024, 256)
-		FLAGS(USE_CLSR)
-		NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+		NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)
+		MFR_FLAGS(USE_CLSR)
+	},
 	{ "s25fl256s0", INFO6(0x010219, 0x4d0080, 256 * 1024, 128)
-		FLAGS(USE_CLSR)
 		NO_SFDP_FLAGS(SPI_NOR_SKIP_SFDP | SPI_NOR_DUAL_READ |
-			      SPI_NOR_QUAD_READ) },
+			      SPI_NOR_QUAD_READ)
+		MFR_FLAGS(USE_CLSR)
+	},
 	{ "s25fl256s1", INFO6(0x010219, 0x4d0180, 64 * 1024, 512)
-		FLAGS(USE_CLSR)
-		NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+		NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)
+		MFR_FLAGS(USE_CLSR)
+	},
 	{ "s25fl512s",  INFO6(0x010220, 0x4d0080, 256 * 1024, 256)
-		FLAGS(SPI_NOR_HAS_LOCK | USE_CLSR)
-		NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+		FLAGS(SPI_NOR_HAS_LOCK)
+		NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)
+		MFR_FLAGS(USE_CLSR)
+	},
 	{ "s25fs128s1", INFO6(0x012018, 0x4d0181, 64 * 1024, 256)
-		FLAGS(USE_CLSR)
 		NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)
+		MFR_FLAGS(USE_CLSR)
 		.fixups = &s25fs_s_nor_fixups, },
 	{ "s25fs256s0", INFO6(0x010219, 0x4d0081, 256 * 1024, 128)
-		FLAGS(USE_CLSR)
-		NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+		NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)
+		MFR_FLAGS(USE_CLSR)
+	},
 	{ "s25fs256s1", INFO6(0x010219, 0x4d0181, 64 * 1024, 512)
-		FLAGS(USE_CLSR)
-		NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+		NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)
+		MFR_FLAGS(USE_CLSR)
+	},
 	{ "s25fs512s",  INFO6(0x010220, 0x4d0081, 256 * 1024, 256)
-		FLAGS(USE_CLSR)
 		NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)
+		MFR_FLAGS(USE_CLSR)
 		.fixups = &s25fs_s_nor_fixups, },
 	{ "s25sl12800", INFO(0x012018, 0x0300, 256 * 1024,  64) },
 	{ "s25sl12801", INFO(0x012018, 0x0301,  64 * 1024, 256) },
 	{ "s25fl129p0", INFO(0x012018, 0x4d00, 256 * 1024,  64)
-		FLAGS(USE_CLSR)
-		NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+		NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)
+		MFR_FLAGS(USE_CLSR)
+	},
 	{ "s25fl129p1", INFO(0x012018, 0x4d01,  64 * 1024, 256)
-		FLAGS(USE_CLSR)
-		NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+		NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)
+		MFR_FLAGS(USE_CLSR)
+	},
 	{ "s25sl004a",  INFO(0x010212,      0,  64 * 1024,   8) },
 	{ "s25sl008a",  INFO(0x010213,      0,  64 * 1024,  16) },
 	{ "s25sl016a",  INFO(0x010214,      0,  64 * 1024,  32) },
@@ -370,7 +383,7 @@ static void spansion_nor_late_init(struct spi_nor *nor)
 		nor->mtd.erasesize = nor->info->sector_size;
 	}
 
-	if (nor->flags & SNOR_F_USE_CLSR)
+	if (nor->info->mfr_flags & USE_CLSR)
 		nor->params->ready = spi_nor_sr_ready_and_clear;
 }
 
-- 
2.30.2


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  parent reply	other threads:[~2022-02-23 14:34 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-02-23 13:43 [PATCH v5 00/32] mtd: spi-nor: move vendor specific code into vendor modules Michael Walle
2022-02-23 13:43 ` [PATCH v5 01/32] mtd: spi-nor: atmel: unify function names Michael Walle
2022-02-23 13:43 ` [PATCH v5 02/32] mtd: spi-nor: catalyst: " Michael Walle
2022-02-23 13:43 ` [PATCH v5 03/32] mtd: spi-nor: eon: " Michael Walle
2022-02-23 13:43 ` [PATCH v5 04/32] mtd: spi-nor: esmt: " Michael Walle
2022-02-23 13:43 ` [PATCH v5 05/32] mtd: spi-nor: everspin: " Michael Walle
2022-02-23 13:43 ` [PATCH v5 06/32] mtd: spi-nor: fujitsu: " Michael Walle
2022-02-23 13:43 ` [PATCH v5 07/32] mtd: spi-nor: gigadevice: " Michael Walle
2022-02-23 13:43 ` [PATCH v5 08/32] mtd: spi-nor: intel: " Michael Walle
2022-02-23 13:43 ` [PATCH v5 09/32] mtd: spi-nor: issi: " Michael Walle
2022-02-23 13:43 ` [PATCH v5 10/32] mtd: spi-nor: macronix: " Michael Walle
2022-02-23 13:43 ` [PATCH v5 11/32] mtd: spi-nor: micron-st: " Michael Walle
2022-02-25 13:35   ` Tudor.Ambarus
2022-02-25 13:36     ` Tudor.Ambarus
2022-02-25 15:36   ` Tudor.Ambarus
2022-02-23 13:43 ` [PATCH v5 12/32] mtd: spi-nor: spansion: " Michael Walle
2022-02-23 13:43 ` [PATCH v5 13/32] mtd: spi-nor: sst: " Michael Walle
2022-02-23 13:43 ` [PATCH v5 14/32] mtd: spi-nor: winbond: " Michael Walle
2022-02-23 13:43 ` [PATCH v5 15/32] mtd: spi-nor: xilinx: " Michael Walle
2022-02-23 13:43 ` [PATCH v5 16/32] mtd: spi-nor: xmc: " Michael Walle
2022-02-23 13:43 ` [PATCH v5 17/32] mtd: spi-nor: slightly refactor the spi_nor_setup() Michael Walle
2022-02-23 13:43 ` [PATCH v5 18/32] mtd: spi-nor: allow a flash to define its own ready() function Michael Walle
2022-02-23 13:43 ` [PATCH v5 19/32] mtd: spi-nor: export more function to be used in vendor modules Michael Walle
2022-02-23 13:43 ` [PATCH v5 20/32] mtd: spi-nor: guard _page_size parameter in S3AN_INFO() Michael Walle
2022-02-23 13:43 ` [PATCH v5 21/32] mtd: spi-nor: move all xilinx specifics into xilinx.c Michael Walle
2022-02-23 13:43 ` [PATCH v5 22/32] mtd: spi-nor: xilinx: rename vendor specific functions and defines Michael Walle
2022-02-25 14:02   ` Tudor.Ambarus
2022-02-23 13:43 ` [PATCH v5 23/32] mtd: spi-nor: xilinx: correct the debug message Michael Walle
2022-02-23 13:43 ` [PATCH v5 24/32] mtd: spi-nor: move all micron-st specifics into micron-st.c Michael Walle
2022-02-23 13:43 ` [PATCH v5 25/32] mtd: spi-nor: micron-st: convert USE_FSR to a manufacturer flag Michael Walle
2022-02-23 13:43 ` [PATCH v5 26/32] mtd: spi-nor: micron-st: rename vendor specific functions and defines Michael Walle
2022-02-23 14:56   ` Pratyush Yadav
2022-02-25 14:03   ` Tudor.Ambarus
2022-02-25 15:36     ` Michael Walle
2022-02-25 15:38       ` Tudor.Ambarus
2022-02-23 13:43 ` [PATCH v5 27/32] mtd: spi-nor: spansion: slightly rework control flow in late_init() Michael Walle
2022-02-23 13:43 ` [PATCH v5 28/32] mtd: spi-nor: move all spansion specifics into spansion.c Michael Walle
2022-02-23 13:43 ` Michael Walle [this message]
2022-02-23 13:43 ` [PATCH v5 30/32] mtd: spi-nor: spansion: rename vendor specific functions and defines Michael Walle
2022-02-25 14:07   ` Tudor.Ambarus
2022-02-23 13:43 ` [PATCH v5 31/32] mtd: spi-nor: slightly change code style in spi_nor_sr_ready() Michael Walle
2022-02-25 14:08   ` Tudor.Ambarus
2022-02-23 13:43 ` [PATCH v5 32/32] mtd: spi-nor: renumber flags Michael Walle
2022-02-25 16:18 ` [PATCH v5 00/32] mtd: spi-nor: move vendor specific code into vendor modules Tudor Ambarus

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