[PATCH] mtd: spi-nor: issi: Add IS25WP512 device

[niravkumar.l.rabara@intel.com]

From: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>

Add is25wp512 info to spi_nor_ids[] table entry.

Rename is25lp256_post_bfpt_fixups to is25xx_post_bfpt_fixups
as a common function for all is25xx post_bfpt fixups.

Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
---
 drivers/mtd/spi-nor/issi.c | 25 ++++++++++++++++---------
 1 file changed, 16 insertions(+), 9 deletions(-)

diff --git a/drivers/mtd/spi-nor/issi.c b/drivers/mtd/spi-nor/issi.c
index c012bc2486e1..14fe07e55f85 100644
--- a/drivers/mtd/spi-nor/issi.c
+++ b/drivers/mtd/spi-nor/issi.c
@@ -9,24 +9,27 @@
 #include "core.h"
 
 static int
-is25lp256_post_bfpt_fixups(struct spi_nor *nor,
+is25xx_post_bfpt_fixups(struct spi_nor *nor,
 			   const struct sfdp_parameter_header *bfpt_header,
 			   const struct sfdp_bfpt *bfpt)
 {
 	/*
-	 * IS25LP256 supports 4B opcodes, but the BFPT advertises a
-	 * BFPT_DWORD1_ADDRESS_BYTES_3_ONLY address width.
+	 * IS25XX256 & IS25XX512 supports 4B opcodes,
+	 * but the BFPT advertises BFPT_DWORD1_ADDRESS_BYTES_3_ONLY and
+	 * BFPT_DWORD1_ADDRESS_BYTES_3_OR_4 address width repectively.
 	 * Overwrite the address width advertised by the BFPT.
 	 */
-	if ((bfpt->dwords[BFPT_DWORD(1)] & BFPT_DWORD1_ADDRESS_BYTES_MASK) ==
-		BFPT_DWORD1_ADDRESS_BYTES_3_ONLY)
+	if (((bfpt->dwords[BFPT_DWORD(1)] & BFPT_DWORD1_ADDRESS_BYTES_MASK) ==
+		BFPT_DWORD1_ADDRESS_BYTES_3_ONLY) ||
+		((bfpt->dwords[BFPT_DWORD(1)] & BFPT_DWORD1_ADDRESS_BYTES_MASK) ==
+		BFPT_DWORD1_ADDRESS_BYTES_3_OR_4))
 		nor->addr_width = 4;
 
 	return 0;
 }
 
-static const struct spi_nor_fixups is25lp256_fixups = {
-	.post_bfpt = is25lp256_post_bfpt_fixups,
+static struct spi_nor_fixups is25xx_fixups = {
+	.post_bfpt = is25xx_post_bfpt_fixups,
 };
 
 static const struct flash_info issi_nor_parts[] = {
@@ -48,7 +51,7 @@ static const struct flash_info issi_nor_parts[] = {
 	{ "is25lp256",  INFO(0x9d6019, 0, 64 * 1024, 512)
 		PARSE_SFDP
 		FIXUP_FLAGS(SPI_NOR_4B_OPCODES)
-		.fixups = &is25lp256_fixups },
+		.fixups = &is25xx_fixups },
 	{ "is25wp032",  INFO(0x9d7016, 0, 64 * 1024,  64)
 		NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
 	{ "is25wp064",  INFO(0x9d7017, 0, 64 * 1024, 128)
@@ -58,7 +61,11 @@ static const struct flash_info issi_nor_parts[] = {
 	{ "is25wp256", INFO(0x9d7019, 0, 64 * 1024, 512)
 		NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)
 		FIXUP_FLAGS(SPI_NOR_4B_OPCODES)
-		.fixups = &is25lp256_fixups },
+		.fixups = &is25xx_fixups },
+	{ "is25wp512", INFO(0x9d701a, 0, 64 * 1024, 1024)
+		NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)
+		FIXUP_FLAGS(SPI_NOR_4B_OPCODES)
+		.fixups = &is25xx_fixups },
 
 	/* PMC */
 	{ "pm25lv512",   INFO(0,        0, 32 * 1024,    2)
-- 
2.25.1


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