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From: Pratyush Yadav <p.yadav@ti.com>
To: <tkuw584924@gmail.com>
Cc: <linux-mtd@lists.infradead.org>, <tudor.ambarus@microchip.com>,
	<miquel.raynal@bootlin.com>, <richard@nod.at>, <vigneshr@ti.com>,
	<michael@walle.cc>, <Bacem.Daassi@infineon.com>
Subject: Re: [PATCH v15 1/8] mtd: spi-nor: s/addr_width/addr_nbytes
Date: Tue, 31 May 2022 16:43:41 +0530	[thread overview]
Message-ID: <20220531111341.bprxpiam7327hdhe@ti.com> (raw)
In-Reply-To: <c56fb52bf191e3ae77572b042c2ff452f4919612.1652063152.git.Takahiro.Kuwano@infineon.com>

On 10/05/22 07:10AM, tkuw584924@gmail.com wrote:
> From: Tudor Ambarus <tudor.ambarus@microchip.com>
> 
> Address width was an unfortunate name, as it means the number of IO lines
> used for the address, whereas in the code it is used as the number of
> address bytes. s/addr_width/addr_nbytes throughout the entire SPI NOR
> framework.
> 
> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
> ---
>  drivers/mtd/spi-nor/controllers/aspeed-smc.c |  6 +--
>  drivers/mtd/spi-nor/controllers/hisi-sfc.c   |  2 +-
>  drivers/mtd/spi-nor/controllers/nxp-spifi.c  |  8 ++--
>  drivers/mtd/spi-nor/core.c                   | 46 ++++++++++----------
>  drivers/mtd/spi-nor/core.h                   | 12 ++---
>  drivers/mtd/spi-nor/issi.c                   |  2 +-
>  drivers/mtd/spi-nor/otp.c                    | 12 ++---
>  drivers/mtd/spi-nor/sfdp.c                   | 32 +++++++-------
>  drivers/mtd/spi-nor/xilinx.c                 |  2 +-
>  include/linux/mtd/spi-nor.h                  |  4 +-
>  10 files changed, 63 insertions(+), 63 deletions(-)
> 
> diff --git a/drivers/mtd/spi-nor/controllers/aspeed-smc.c b/drivers/mtd/spi-nor/controllers/aspeed-smc.c
> index acfe010f9dd7..5ac8c321535b 100644
> --- a/drivers/mtd/spi-nor/controllers/aspeed-smc.c
> +++ b/drivers/mtd/spi-nor/controllers/aspeed-smc.c
> @@ -350,10 +350,10 @@ static void aspeed_smc_send_cmd_addr(struct spi_nor *nor, u8 cmd, u32 addr)
>  	__be32 temp;
>  	u32 cmdaddr;
>  
> -	switch (nor->addr_width) {
> +	switch (nor->addr_nbytes) {
>  	default:
>  		WARN_ONCE(1, "Unexpected address width %u, defaulting to 3\n",

s/width/nbytes/ here as well.

> -			  nor->addr_width);
> +			  nor->addr_nbytes);
>  		fallthrough;
>  	case 3:
>  		cmdaddr = addr & 0xFFFFFF;
> @@ -709,7 +709,7 @@ static int aspeed_smc_chip_setup_finish(struct aspeed_smc_chip *chip)
>  	const struct aspeed_smc_info *info = controller->info;
>  	u32 cmd;
>  
> -	if (chip->nor.addr_width == 4 && info->set_4b)
> +	if (chip->nor.addr_nbytes == 4 && info->set_4b)
>  		info->set_4b(chip);
>  
>  	/* This is for direct AHB access when using Command Mode. */
> diff --git a/drivers/mtd/spi-nor/controllers/hisi-sfc.c b/drivers/mtd/spi-nor/controllers/hisi-sfc.c
> index 94a969185ceb..5070d72835ec 100644
> --- a/drivers/mtd/spi-nor/controllers/hisi-sfc.c
> +++ b/drivers/mtd/spi-nor/controllers/hisi-sfc.c
> @@ -237,7 +237,7 @@ static int hisi_spi_nor_dma_transfer(struct spi_nor *nor, loff_t start_off,
>  	reg = readl(host->regbase + FMC_CFG);
>  	reg &= ~(FMC_CFG_OP_MODE_MASK | SPI_NOR_ADDR_MODE_MASK);
>  	reg |= FMC_CFG_OP_MODE_NORMAL;
> -	reg |= (nor->addr_width == 4) ? SPI_NOR_ADDR_MODE_4BYTES
> +	reg |= (nor->addr_nbytes == 4) ? SPI_NOR_ADDR_MODE_4BYTES
>  		: SPI_NOR_ADDR_MODE_3BYTES;
>  	writel(reg, host->regbase + FMC_CFG);
>  
> diff --git a/drivers/mtd/spi-nor/controllers/nxp-spifi.c b/drivers/mtd/spi-nor/controllers/nxp-spifi.c
> index 9032b9ab2eaf..ab3990e6ac25 100644
> --- a/drivers/mtd/spi-nor/controllers/nxp-spifi.c
> +++ b/drivers/mtd/spi-nor/controllers/nxp-spifi.c
> @@ -203,7 +203,7 @@ static ssize_t nxp_spifi_write(struct spi_nor *nor, loff_t to, size_t len,
>  	      SPIFI_CMD_DATALEN(len) |
>  	      SPIFI_CMD_FIELDFORM_ALL_SERIAL |
>  	      SPIFI_CMD_OPCODE(nor->program_opcode) |
> -	      SPIFI_CMD_FRAMEFORM(spifi->nor.addr_width + 1);
> +	      SPIFI_CMD_FRAMEFORM(spifi->nor.addr_nbytes + 1);
>  	writel(cmd, spifi->io_base + SPIFI_CMD);
>  
>  	for (i = 0; i < len; i++)
> @@ -230,7 +230,7 @@ static int nxp_spifi_erase(struct spi_nor *nor, loff_t offs)
>  
>  	cmd = SPIFI_CMD_FIELDFORM_ALL_SERIAL |
>  	      SPIFI_CMD_OPCODE(nor->erase_opcode) |
> -	      SPIFI_CMD_FRAMEFORM(spifi->nor.addr_width + 1);
> +	      SPIFI_CMD_FRAMEFORM(spifi->nor.addr_nbytes + 1);
>  	writel(cmd, spifi->io_base + SPIFI_CMD);
>  
>  	return nxp_spifi_wait_for_cmd(spifi);
> @@ -252,12 +252,12 @@ static int nxp_spifi_setup_memory_cmd(struct nxp_spifi *spifi)
>  	}
>  
>  	/* Memory mode supports address length between 1 and 4 */
> -	if (spifi->nor.addr_width < 1 || spifi->nor.addr_width > 4)
> +	if (spifi->nor.addr_nbytes < 1 || spifi->nor.addr_nbytes > 4)
>  		return -EINVAL;
>  
>  	spifi->mcmd |= SPIFI_CMD_OPCODE(spifi->nor.read_opcode) |
>  		       SPIFI_CMD_INTLEN(spifi->nor.read_dummy / 8) |
> -		       SPIFI_CMD_FRAMEFORM(spifi->nor.addr_width + 1);
> +		       SPIFI_CMD_FRAMEFORM(spifi->nor.addr_nbytes + 1);
>  
>  	return 0;
>  }
> diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
> index 2bfa84100d38..7db6b41d7c30 100644
> --- a/drivers/mtd/spi-nor/core.c
> +++ b/drivers/mtd/spi-nor/core.c
> @@ -38,7 +38,7 @@
>   */
>  #define CHIP_ERASE_2MB_READY_WAIT_JIFFIES	(40UL * HZ)
>  
> -#define SPI_NOR_MAX_ADDR_WIDTH	4
> +#define SPI_NOR_MAX_ADDR_NBYTES	4
>  
>  #define SPI_NOR_SRST_SLEEP_MIN 200
>  #define SPI_NOR_SRST_SLEEP_MAX 400
> @@ -198,7 +198,7 @@ static ssize_t spi_nor_spimem_read_data(struct spi_nor *nor, loff_t from,
>  {
>  	struct spi_mem_op op =
>  		SPI_MEM_OP(SPI_MEM_OP_CMD(nor->read_opcode, 0),
> -			   SPI_MEM_OP_ADDR(nor->addr_width, from, 0),
> +			   SPI_MEM_OP_ADDR(nor->addr_nbytes, from, 0),

I am guessing this patch no longer applies since c0abb861c5d0 ("mtd: 
spi-nor: Introduce templates for SPI NOR operations"). Patch looks good 
otherwise.

Acked-by: Pratyush Yadav <p.yadav@ti.com>

[...]

-- 
Regards,
Pratyush Yadav
Texas Instruments Inc.

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http://lists.infradead.org/mailman/listinfo/linux-mtd/

  parent reply	other threads:[~2022-05-31 11:14 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-09 22:10 [PATCH v15 0/8] mtd: spi-nor: Add support for Infineon s25hl-t/s25hs-t tkuw584924
2022-05-09 22:10 ` [PATCH v15 1/8] mtd: spi-nor: s/addr_width/addr_nbytes tkuw584924
2022-05-12 21:01   ` Michael Walle
2022-05-31 11:13   ` Pratyush Yadav [this message]
2022-05-09 22:10 ` [PATCH v15 2/8] mtd: spi-nor: core: Shrink the storage size of the flash_info's addr_nbytes tkuw584924
2022-05-12 21:22   ` Michael Walle
2022-05-31 11:14   ` Pratyush Yadav
2022-05-09 22:10 ` [PATCH v15 3/8] mtd: spi-nor: sfdp: Clarify that nor->read_{opcode, dummy} are uninitialized tkuw584924
2022-05-12 21:33   ` Michael Walle
2022-05-12 21:38     ` Michael Walle
2022-05-31 11:18   ` Pratyush Yadav
2022-05-09 22:10 ` [PATCH v15 4/8] mtd: spi-nor: Do not change nor->addr_nbytes at SFDP parsing time tkuw584924
2022-05-12 21:45   ` Michael Walle
2022-05-31 11:30   ` Pratyush Yadav
2022-07-21 14:32     ` Tudor.Ambarus
2022-07-21 15:02     ` Tudor.Ambarus
2022-05-09 22:10 ` [PATCH v15 5/8] mtd: spi-nor: core: Couple the number of address bytes with the address mode tkuw584924
2022-05-12 22:07   ` Michael Walle
2022-05-09 22:10 ` [PATCH v15 6/8] mtd: spi-nor: Retain nor->addr_width at 4BAIT parse tkuw584924
2022-05-12 22:14   ` Michael Walle
2022-05-13  1:26     ` Takahiro Kuwano
2022-05-13  9:40       ` Michael Walle
2022-05-14  3:51         ` Takahiro Kuwano
2022-05-18  6:04           ` Takahiro Kuwano
2022-05-18  8:35             ` Michael Walle
2022-05-18  9:12               ` Takahiro Kuwano
2022-05-23  7:49           ` Michael Walle
2022-05-23  9:56             ` Takahiro Kuwano
2022-06-03  9:33               ` Takahiro Kuwano
2022-07-21 16:06             ` Tudor.Ambarus
2022-07-22  4:00               ` Takahiro Kuwano
2022-07-22  4:20                 ` Tudor.Ambarus
2022-07-22  4:31                   ` Vanessa Page
2022-07-22  4:46                   ` Takahiro Kuwano
2022-07-22  5:06                     ` Tudor.Ambarus
2022-07-22  5:11                       ` Takahiro Kuwano
2022-07-22  6:08                         ` Tudor.Ambarus
2022-07-22  7:38                           ` Tudor.Ambarus
2022-07-22  7:45                             ` Tudor.Ambarus
2022-06-08 11:39           ` Tudor.Ambarus
2022-05-09 22:10 ` [PATCH v15 7/8] mtd: spi-nor: spansion: Add local function to discover page size tkuw584924
2022-05-09 22:10 ` [PATCH v15 8/8] mtd: spi-nor: spansion: Add s25hl-t/s25hs-t IDs and fixups tkuw584924

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