Re: [PATCH] mtd: devices: add fixups to support MT28FW02GBBA1HPC

Miquel Raynal
2022-10-19T14:01:50Z

Hi Andreas,

ennoerlangen@gmail.com wrote on Wed, 19 Oct 2022 15:50:07 +0200:

> Apply existing fixups for MT28FW02GBBA1HPC from:
> Commit 0a8e98305f63deaf0a799d5cf5532cc83af035d1 ("mtd: cfi_cmdset_0002:
> Use chip_ready() for write on S29GL064N")
> Commit 0fe3ede7941dfcd6fd540fc2b086453d3ee8f236 ("mtd: cfi: Add early
> fixup for S70GL02GS")
>

The subject prefix is wrong and you need to use get_maintainers.pl to
find the right maintainers (in this case, Vignesh) and catch his
attention with the right title.

> Signed-off-by: Andreas Oetken <ennoerlangen@gmail.com>
> ---
> drivers/mtd/chips/cfi_cmdset_0002.c | 4 +++-
> drivers/mtd/chips/cfi_probe.c | 15 ++++++++++++++-
> 2 files changed, 17 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/mtd/chips/cfi_cmdset_0002.c b/drivers/mtd/chips/cfi_cmdset_0002.c
> index 9bd65f3f805c..4e0bc2a1abb5 100644
> --- a/drivers/mtd/chips/cfi_cmdset_0002.c
> +++ b/drivers/mtd/chips/cfi_cmdset_0002.c
> @@ -441,8 +441,10 @@ static void fixup_quirks(struct mtd_info *mtd)
> struct map_info *map = mtd->priv;
> struct cfi_private *cfi = map->fldrv_priv;
>
> - if (cfi->mfr == CFI_MFR_AMD && cfi->id == 0x0c01)
> + if (cfi->mfr == CFI_MFR_AMD && cfi->id == 0x0c01 ||
> + cfi->mfr == CFI_MFR_INTEL && cfi->id == 0x227e) /*MT28FW02GBBA1HPC*/
> cfi->quirks |= CFI_QUIRK_DQ_TRUE_DATA;
> +
> }
>
> /* Used to fix CFI-Tables of chips without Extended Query Tables */
> diff --git a/drivers/mtd/chips/cfi_probe.c b/drivers/mtd/chips/cfi_probe.c
> index cf426956454c..102c1ffb9aad 100644
> --- a/drivers/mtd/chips/cfi_probe.c
> +++ b/drivers/mtd/chips/cfi_probe.c
> @@ -186,9 +186,22 @@ static void fixup_s70gl02gs_chips(struct cfi_private *cfi)
> pr_warn("Bad S70GL02GS CFI data; adjust to detect 2 chips\n");
> }
>
> +
> +static void fixup_mt28fw02gbba1hpc_chips(struct cfi_private *cfi)
> +{
> + /*
> + * MT28FW02GBBA1HPC flash reports a single 256 MiB chip, but is really made up
> + * of two 128 MiB chips with 1024 sectors each.
> + */
> + cfi->cfiq->DevSize = 27;
> + cfi->cfiq->EraseRegionInfo[0] = 0x20003ff;
> + pr_warn("Bad MT28FW02GBBA1HPC CFI data; adjust to detect 2 chips\n");
> +}
> +
> static const struct cfi_early_fixup cfi_early_fixup_table[] = {
> { CFI_MFR_AMD, 0x4801, fixup_s70gl02gs_chips },
> - { },
> + { CFI_MFR_INTEL, 0x227e, fixup_mt28fw02gbba1hpc_chips},
> + { }
> };
>
> static int __xipram cfi_chip_setup(struct map_info *map,

Thanks,
Miquèl

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