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From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Pratyush Yadav <pratyush@kernel.org>
Cc: Richard Weinberger <richard@nod.at>,
	Vignesh Raghavendra <vigneshr@ti.com>,
	Tudor Ambarus <Tudor.Ambarus@microchip.com>,
	Pratyush Yadav <p.yadav@ti.com>, Michael Walle <michael@walle.cc>,
	linux-mtd@lists.infradead.org, Julien Su <juliensu@mxic.com.tw>,
	Jaime Liao <jaimeliao@mxic.com.tw>,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Subject: Re: [PATCH v2 2/9] mtd: spi-nor: Introduce the concept of bank
Date: Mon, 21 Nov 2022 09:26:54 +0100	[thread overview]
Message-ID: <20221121092654.45cfd177@xps-13> (raw)
In-Reply-To: <20221120161135.e33livsa5rdolmx2@yadavpratyush.com>

Hi Pratyush,

pratyush@kernel.org wrote on Sun, 20 Nov 2022 17:11:35 +0100:

> On 10/11/22 04:55PM, Miquel Raynal wrote:
> > SPI-NOR chips are made of pages, which gathered in small groups make
> > (erase) sectors. Sectors, gathered together, make banks inside the
> > chip. So far there was only one bank per device supported, but we are
> > about to introduce support for new chips featuring several banks (up to
> > 4 so far) where different operations may happen in parallel.
> > 
> > Let's allow describing these additional bank parameters.  
> 
> Just to be sure, are the multiple banks still used via a single Chip 
> Select, or do we need multi-CS support for this as well? I do remember 
> seeing an RFC about multi-CS support from you some time back and I am 
> not sure if that is related.

I confirm this is not related to the multi-CS binding I worked on
earlier. All the banks I am talking about are expected to be used via a
single CS.

> Reviewed-by: Pratyush Yadav <pratyush@kernel.org>

Thanks for the reviews!

Cheers,
Miquèl

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  reply	other threads:[~2022-11-21  8:28 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-11-10 15:55 [PATCH v2 0/9] mtd: spi-nor: read while write support Miquel Raynal
2022-11-10 15:55 ` [PATCH v2 1/9] mtd: spi-nor: Create macros to define chip IDs and geometries Miquel Raynal
2022-11-20 15:57   ` Pratyush Yadav
2022-11-10 15:55 ` [PATCH v2 2/9] mtd: spi-nor: Introduce the concept of bank Miquel Raynal
2022-11-20 16:11   ` Pratyush Yadav
2022-11-21  8:26     ` Miquel Raynal [this message]
2022-11-10 15:55 ` [PATCH v2 3/9] mtd: spi-nor: Add a macro to define more banks Miquel Raynal
2022-11-20 16:13   ` Pratyush Yadav
2022-11-10 15:55 ` [PATCH v2 4/9] mtd: spi-nor: Reorder the preparation vs locking steps Miquel Raynal
2022-11-10 15:55 ` [PATCH v2 5/9] mtd: spi-nor: Separate preparation and locking Miquel Raynal
2022-11-10 15:55 ` [PATCH v2 6/9] mtd: spi-nor: Prepare the introduction of a new locking mechanism Miquel Raynal
2022-11-10 15:55 ` [PATCH v2 7/9] mtd: spi-nor: Add a RWW flag Miquel Raynal
2022-11-10 15:55 ` [PATCH v2 8/9] mtd: spi-nor: Enhance locking to support reads while writes Miquel Raynal
2022-12-01 10:54   ` Miquel Raynal
2022-11-10 15:55 ` [PATCH v2 9/9] mtd: spi-nor: macronix: Add support for mx25uw51245g with RWW Miquel Raynal
2022-11-20 15:41 ` [PATCH v2 0/9] mtd: spi-nor: read while write support Pratyush Yadav
2022-11-23 17:19   ` Miquel Raynal

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