From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Tudor Ambarus <tudor.ambarus@linaro.org>
Cc: Richard Weinberger <richard@nod.at>,
Vignesh Raghavendra <vigneshr@ti.com>,
Tudor Ambarus <Tudor.Ambarus@microchip.com>,
Pratyush Yadav <pratyush@kernel.org>,
Michael Walle <michael@walle.cc>,
linux-mtd@lists.infradead.org, Julien Su <juliensu@mxic.com.tw>,
Jaime Liao <jaimeliao@mxic.com.tw>,
Alvin Zhou <alvinzhou@mxic.com.tw>,
Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Subject: Re: [PATCH v3 4/9] mtd: spi-nor: Reorder the preparation vs locking steps
Date: Wed, 1 Feb 2023 12:36:05 +0100 [thread overview]
Message-ID: <20230201123605.23152b81@xps-13> (raw)
In-Reply-To: <b1841011-ba05-e290-d9b1-336a2346b1e3@linaro.org>
Hi Tudor,
tudor.ambarus@linaro.org wrote on Tue, 31 Jan 2023 05:11:33 +0000:
> Hi, Miquel,
>
> On 12/15/22 08:12, Miquel Raynal wrote:
> > The ->prepare()/->unprepare() hooks are now legacy, and there are only
> > two controllers left supporting them. In both cases, the implementation
>
> now there's only one, hisi-sfc.c.
Indeed.
>
> > acquires a mutex, which is somehow redundant with the spi-nor main lock
>
> I see a HIFMC_MAX_CHIP_NUM with value 2, the controller seems to be able
> to operate 2 flashes in parallel and that's why the internal mutex.
>
> > that we acquire as well in the spi_nor_[un]lock_and_[un]prep() helpers.
> >
> > While the mutex taken in the core is necessary, the helper can be
> > reorganized to first do the preparation, then acquire the core
> > lock. This is necessary in order to be able to improve the locking
> > mechanism in the core and should have no side effect.
> >
>
> the change seems fine for hisi, and since we're no longer adding drivers
> under spi-nor/controllers we should be good.
>
> > Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
> > ---
> > drivers/mtd/spi-nor/core.c | 15 ++++++---------
> > 1 file changed, 6 insertions(+), 9 deletions(-)
> >
> > diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
> > index 38a57aac6754..de77ca55f74d 100644
> > --- a/drivers/mtd/spi-nor/core.c
> > +++ b/drivers/mtd/spi-nor/core.c
> > @@ -1074,23 +1074,20 @@ int spi_nor_lock_and_prep(struct spi_nor *nor)
>
> you'll have to rename it to spi_nor_prep_and_lock to reflect the order
> of ops.
Sure.
>
> > {
> > int ret = 0;
> > > - mutex_lock(&nor->lock);
> > -
> > - if (nor->controller_ops && nor->controller_ops->prepare) {
> > + if (nor->controller_ops && nor->controller_ops->prepare)
> > ret = nor->controller_ops->prepare(nor);
> > - if (ret) {
> > - mutex_unlock(&nor->lock);
> > - return ret;
> > - }
> > - }
> > +
> > + mutex_lock(&nor->lock);
> > +
> > return ret;
> > }
> >
>
> Cheers,
> ta
Thanks,
Miquèl
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next prev parent reply other threads:[~2023-02-01 11:37 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-12-15 8:12 [PATCH v3 0/9] mtd: spi-nor: read while write support Miquel Raynal
2022-12-15 8:12 ` [PATCH v3 1/9] mtd: spi-nor: Create macros to define chip IDs and geometries Miquel Raynal
2023-01-31 8:58 ` Tudor Ambarus
2022-12-15 8:12 ` [PATCH v3 2/9] mtd: spi-nor: Introduce the concept of bank Miquel Raynal
2023-01-19 16:34 ` Tudor Ambarus
2023-02-01 11:32 ` Miquel Raynal
2023-03-17 3:33 ` Tudor Ambarus
2023-03-24 15:13 ` Miquel Raynal
2022-12-15 8:12 ` [PATCH v3 3/9] mtd: spi-nor: Add a macro to define more banks Miquel Raynal
2022-12-15 8:12 ` [PATCH v3 4/9] mtd: spi-nor: Reorder the preparation vs locking steps Miquel Raynal
2023-01-31 5:11 ` Tudor Ambarus
2023-02-01 11:36 ` Miquel Raynal [this message]
2022-12-15 8:12 ` [PATCH v3 5/9] mtd: spi-nor: Separate preparation and locking Miquel Raynal
2022-12-15 8:12 ` [PATCH v3 6/9] mtd: spi-nor: Prepare the introduction of a new locking mechanism Miquel Raynal
2023-01-31 5:29 ` Tudor Ambarus
2022-12-15 8:12 ` [PATCH v3 7/9] mtd: spi-nor: Add a RWW flag Miquel Raynal
2022-12-15 8:12 ` [PATCH v3 8/9] mtd: spi-nor: Enhance locking to support reads while writes Miquel Raynal
2022-12-15 8:12 ` [PATCH v3 9/9] mtd: spi-nor: macronix: Add support for mx25uw51245g with RWW Miquel Raynal
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