From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Richard Weinberger <richard@nod.at>,
Vignesh Raghavendra <vigneshr@ti.com>,
Tudor Ambarus <tudor.ambarus@linaro.org>,
Pratyush Yadav <pratyush@kernel.org>,
Michael Walle <michael@walle.cc>, <linux-mtd@lists.infradead.org>
Cc: Julien Su <juliensu@mxic.com.tw>,
Jaime Liao <jaimeliao@mxic.com.tw>,
Jaime Liao <jaimeliao.tw@gmail.com>,
Alvin Zhou <alvinzhou@mxic.com.tw>,
Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
Michal Simek <monstr@monstr.eu>,
<linux-arm-kernel@lists.infradead.org>,
Miquel Raynal <miquel.raynal@bootlin.com>
Subject: [PATCH v5 2/8] mtd: spi-nor: Add a macro to define more banks
Date: Tue, 28 Mar 2023 17:40:59 +0200 [thread overview]
Message-ID: <20230328154105.448540-3-miquel.raynal@bootlin.com> (raw)
In-Reply-To: <20230328154105.448540-1-miquel.raynal@bootlin.com>
Most of the chips on the market only feature a single bank. However, new
chips may support more than a single bank, with the possibility to
parallelize some operations. Let's introduce an INFOB() macro which also
takes a n_bank parameter.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Pratyush Yadav <pratyush@kernel.org>
---
drivers/mtd/spi-nor/core.h | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h
index db0e458810c7..bf2e64671856 100644
--- a/drivers/mtd/spi-nor/core.h
+++ b/drivers/mtd/spi-nor/core.h
@@ -555,6 +555,10 @@ struct flash_info {
SPI_NOR_ID((_jedec_id), (_ext_id)), \
SPI_NOR_GEOMETRY((_sector_size), (_n_sectors), 1),
+#define INFOB(_jedec_id, _ext_id, _sector_size, _n_sectors, _n_banks) \
+ SPI_NOR_ID((_jedec_id), (_ext_id)), \
+ SPI_NOR_GEOMETRY((_sector_size), (_n_sectors), (_n_banks)),
+
#define INFO6(_jedec_id, _ext_id, _sector_size, _n_sectors) \
SPI_NOR_ID6((_jedec_id), (_ext_id)), \
SPI_NOR_GEOMETRY((_sector_size), (_n_sectors), 1),
--
2.34.1
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next prev parent reply other threads:[~2023-03-28 15:42 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-28 15:40 [PATCH v5 0/8] mtd: spi-nor: read while write support Miquel Raynal
2023-03-28 15:40 ` [PATCH v5 1/8] mtd: spi-nor: Introduce the concept of bank Miquel Raynal
2023-03-28 15:40 ` Miquel Raynal [this message]
2023-03-28 15:41 ` [PATCH v5 3/8] mtd: spi-nor: Reorder the preparation vs. locking steps Miquel Raynal
2023-03-28 15:41 ` [PATCH v5 4/8] mtd: spi-nor: Separate preparation and locking Miquel Raynal
2023-03-28 15:41 ` [PATCH v5 5/8] mtd: spi-nor: Prepare the introduction of a new locking mechanism Miquel Raynal
2023-03-28 15:41 ` [PATCH v5 6/8] mtd: spi-nor: Add a RWW flag Miquel Raynal
2023-03-28 15:41 ` [PATCH v5 7/8] mtd: spi-nor: Enhance locking to support reads while writes Miquel Raynal
2023-03-28 15:41 ` [PATCH v5 8/8] mtd: spi-nor: macronix: Add support for mx25uw51245g with RWW Miquel Raynal
2023-03-28 16:31 ` Tudor Ambarus
2023-03-28 16:45 ` Miquel Raynal
2023-03-29 5:48 ` liao jaime
2023-03-29 11:12 ` Tudor Ambarus
2023-03-29 11:54 ` Miquel Raynal
2023-03-31 19:37 ` Miquel Raynal
2023-04-03 8:08 ` Tudor Ambarus
2023-03-29 10:49 ` Re (subset): [PATCH v5 0/8] mtd: spi-nor: read while write support Tudor Ambarus
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