From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C7FCEEEB57E for ; Sun, 10 Sep 2023 12:44:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=icG0+Y5GmsF2c9gWDP8xv2Ncr3GpzkTKqo63190xXes=; b=lz33qAydb/Ao9Q i2q2neICYK/1qStXmtKroAq/lLNnYKsoDfYibNNGdxTx0hhoYYIXZhYxPVr65PlsSeH1w5IlNknZh Smem0Lfoncl6ICblG81MUkzoj/w0Io50+RwNYpR5BY+j/iG7b1dDlx+yr/eIhcY4akd3Z4oRuuuG4 ttaWAZPNgC5CA/F3RWpRGh03SP3NrjO5b9/YsBSdIyz0wq6Zkf9c9aYL9daqmliQil3XyrR6JUps4 AZtOlD11gNOCxyNk6XKsfHZ+IHxArHO3yfKlpb7352JqQKwrL65wHosGq6bNKCynIKhnWmBuSjafE vy3dRCzFdT4DHEiwQKSg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qfJo5-00GbIP-2Q; Sun, 10 Sep 2023 12:44:53 +0000 Received: from mgamail.intel.com ([134.134.136.31]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qfJo2-00Gb8g-18 for linux-mtd@lists.infradead.org; Sun, 10 Sep 2023 12:44:51 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1694349890; x=1725885890; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=5dzTAxHZzqYNKmXb/NsvT3WH2TDUKk+KWK8tIwHN5Ks=; b=Fdge/inTN1kX8Jk9fQRGnIKCS8IPnyyXAamyfTfE+SNfhFOXmIHJP2Wu nra0USIS+7MlHm8QJv8tBAJf0SyqdXJ4UR6yhUxP6x2GpTkQ1VaM7Bz25 sV54YVAUawcTt90qrJE+1U/h+Qkf2waNX6YlGsgm+Jw7m1/fsYQm8+eKt KU+1V+i4NxYqhQI/SPiGT3kJET0Y9EDckGOcqpGL176e9voYGv0b2RR+X ATwrCPKKzB7HHMSeTG5qUfFUd7wooPjy1rHUgGn66K70NX/434lptoVwl r0CgmHCnuWv6E1A0eXlq9hstXiUFgwYIi24M9Lb2ImyH5uW+1lhpUDSeS w==; X-IronPort-AV: E=McAfee;i="6600,9927,10829"; a="441907125" X-IronPort-AV: E=Sophos;i="6.02,241,1688454000"; d="scan'208";a="441907125" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Sep 2023 05:44:49 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10829"; a="1073815121" X-IronPort-AV: E=Sophos;i="6.02,241,1688454000"; d="scan'208";a="1073815121" Received: from sannilnx-dsk.jer.intel.com ([10.12.231.107]) by fmsmga005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Sep 2023 05:44:47 -0700 From: Alexander Usyskin To: Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Jani Nikula , Joonas Lahtinen , Rodrigo Vivi Cc: Alexander Usyskin , Vitaly Lubart , linux-mtd@lists.infradead.org, intel-gfx@lists.freedesktop.org Subject: [PATCH 08/10] drm/i915/spi: align 64bit read and write Date: Sun, 10 Sep 2023 15:39:47 +0300 Message-Id: <20230910123949.1251964-9-alexander.usyskin@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230910123949.1251964-1-alexander.usyskin@intel.com> References: <20230910123949.1251964-1-alexander.usyskin@intel.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230910_054450_465665_A4374F30 X-CRM114-Status: GOOD ( 12.06 ) X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-mtd" Errors-To: linux-mtd-bounces+linux-mtd=archiver.kernel.org@lists.infradead.org GSC SPI HW errors on quad access overlapping 1K border. Align 64bit read and write to avoid readq/writeq over 1K border. Signed-off-by: Alexander Usyskin --- drivers/gpu/drm/i915/spi/intel_spi_drv.c | 36 ++++++++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/drivers/gpu/drm/i915/spi/intel_spi_drv.c b/drivers/gpu/drm/i915/spi/intel_spi_drv.c index 39369a0c64a0..22b804ebadc0 100644 --- a/drivers/gpu/drm/i915/spi/intel_spi_drv.c +++ b/drivers/gpu/drm/i915/spi/intel_spi_drv.c @@ -14,6 +14,7 @@ #include #include #include "spi/intel_spi.h" +#include "i915_reg_defs.h" #include #include @@ -232,6 +233,24 @@ static ssize_t spi_write(struct i915_spi *spi, u8 region, len_s -= to_shift; } + if (!IS_ALIGNED(to, sizeof(u64)) && + ((to ^ (to + len_s)) & REG_GENMASK(31, 10))) { + /* + * Workaround reads/writes across 1k-aligned addresses + * (start u32 before 1k, end u32 after) + * as this fails on hardware. + */ + u32 data; + + memcpy(&data, &buf[0], sizeof(u32)); + spi_write32(spi, to, data); + if (spi_error(spi)) + return -EIO; + buf += sizeof(u32); + to += sizeof(u32); + len_s -= sizeof(u32); + } + len8 = ALIGN_DOWN(len_s, sizeof(u64)); for (i = 0; i < len8; i += sizeof(u64)) { u64 data; @@ -290,6 +309,23 @@ static ssize_t spi_read(struct i915_spi *spi, u8 region, from += from_shift; } + if (!IS_ALIGNED(from, sizeof(u64)) && + ((from ^ (from + len_s)) & REG_GENMASK(31, 10))) { + /* + * Workaround reads/writes across 1k-aligned addresses + * (start u32 before 1k, end u32 after) + * as this fails on hardware. + */ + u32 data = spi_read32(spi, from); + + if (spi_error(spi)) + return -EIO; + memcpy(&buf[0], &data, sizeof(data)); + len_s -= sizeof(u32); + buf += sizeof(u32); + from += sizeof(u32); + } + len8 = ALIGN_DOWN(len_s, sizeof(u64)); for (i = 0; i < len8; i += sizeof(u64)) { u64 data = spi_read64(spi, from + i); -- 2.34.1 ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/