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boundary="===============1831174221972966614==" Sender: "linux-mtd" Errors-To: linux-mtd-bounces+linux-mtd=archiver.kernel.org@lists.infradead.org --===============1831174221972966614== Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="UDj3Iu6IuX6GpJeg" Content-Disposition: inline --UDj3Iu6IuX6GpJeg Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Thu, Feb 15, 2024 at 07:18:52PM +0530, Md Sadre Alam wrote: > Add device-tree binding documentation for QCOM QPIC-SNAND-NAND Flash > Interface. >=20 > Co-developed-by: Sricharan Ramabadhran > Signed-off-by: Sricharan Ramabadhran > Co-developed-by: Varadarajan Narayanan > Signed-off-by: Varadarajan Narayanan > Signed-off-by: Md Sadre Alam > --- > .../bindings/spi/qcom,spi-qpic-snand.yaml | 82 +++++++++++++++++++ > 1 file changed, 82 insertions(+) > create mode 100644 Documentation/devicetree/bindings/spi/qcom,spi-qpic-s= nand.yaml >=20 > diff --git a/Documentation/devicetree/bindings/spi/qcom,spi-qpic-snand.ya= ml b/Documentation/devicetree/bindings/spi/qcom,spi-qpic-snand.yaml > new file mode 100644 > index 000000000000..fa7484ce1319 > --- /dev/null > +++ b/Documentation/devicetree/bindings/spi/qcom,spi-qpic-snand.yaml > @@ -0,0 +1,82 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/spi/qcom,spi-qpic-snand.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Qualcomm QPIC NAND controller > + > +maintainers: > + - Md sadre Alam > + > +properties: > + compatible: > + enum: > + - qcom,ipq9574-snand > + > + reg: > + maxItems: 1 > + > + clocks: > + minItems: 2 > + maxItems: 3 > + > + clock-names: > + minItems: 2 > + maxItems: 3 > + > +allOf: > + - $ref: /schemas/spi/spi-controller.yaml# > + - if: > + properties: > + compatible: > + contains: > + enum: > + - qcom,ipq9574-snand > + > + then: > + properties: > + dmas: > + items: > + - description: tx DMA channel > + - description: rx DMA channel > + - description: cmd DMA channel > + > + dma-names: > + items: > + - const: tx > + - const: rx > + - const: cmd None of this complexity here is needed, you have only one device in this binding and therefore can define these properties at the top level. Cheers, Conor. > +required: > + - compatible > + - reg > + - clocks > + - clock-names > + > +unevaluatedProperties: false > + > +examples: > + - | > + #include > + qpic_nand: spi@79b0000 { > + compatible =3D "qcom,ipq9574-snand"; > + reg =3D <0x1ac00000 0x800>; > + > + clocks =3D <&gcc GCC_QPIC_CLK>, > + <&gcc GCC_QPIC_AHB_CLK>, > + <&gcc GCC_QPIC_IO_MACRO_CLK>; > + clock-names =3D "core", "aon", "iom"; > + > + #address-cells =3D <1>; > + #size-cells =3D <0>; > + > + flash@0 { > + compatible =3D "spi-nand"; > + reg =3D <0>; > + #address-cells =3D <1>; > + #size-cells =3D <1>; > + nand-ecc-engine =3D <&qpic_nand>; > + nand-ecc-strength =3D <4>; > + nand-ecc-step-size =3D <512>; > + }; > + }; > --=20 > 2.34.1 >=20 --UDj3Iu6IuX6GpJeg Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCZc4eggAKCRB4tDGHoIJi 0vO4AQC/9EXBXWmYMmh41rKINWfmf2C0tle9Rbns/1KqqVSKAQD+Lo3EUIx5DARc ZjZm/tSapiiF/R0brf6h1Z0Dk28FfQQ= =mzbY -----END PGP SIGNATURE----- --UDj3Iu6IuX6GpJeg-- --===============1831174221972966614== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/ --===============1831174221972966614==--