Re: [PATCH v5 1/2] dt-bindings: mtd: amlogic,meson-nand: support fields for boot ROM code

Miquel Raynal
2024-05-07T07:27:43Z

Hi Arseniy,

avkrasnov@salutedevices.com wrote on Tue, 7 May 2024 09:53:06 +0300:

> On 06.05.2024 16:48, Miquel Raynal wrote:
> > Hi Arseniy,
> >
> > avkrasnov@salutedevices.com wrote on Tue, 16 Apr 2024 11:51:00 +0300:
> >
> >> Boot ROM code on Meson requires that some pages on NAND must be written
> >> in special mode: "short" ECC mode where each block is 384 bytes and
> >> scrambling mode is on.
> >
> > Ok
> >
> >> Such pages located with the specified interval within specified offset.
> >
> > I'm sorry I don't get that sentence.
>
> Sorry, I mean this (let me draw :) ) :
>
> [ page 0 ][ page 1 ][ page 2 ][ page 3 ][ page 4 ][ page 5 ][ page 6 ][ page 7 ][ page 8 ][ page 9 ]
>
> For example, we have 10 pages starting from the beginning of the chip - this is "within specified offset",
> e.g. offset is 10. BootROM on axg needs that (for example) every third page must be written in "special"
> mode: scrambling is on and ECC is 384 bytes. Such pages are 0, 2, 4, 6, 8. E.g. "specified interval" will
> be 3.

Shall be 2, no?

>
> So:
>
> amlogic,boot-pages: 10
> amlogic,boot-page-step: 3

Ok I get it. Thanks for the explanation. I don't really understand the
logic behind it though. Do you know why the bootROM would access only
one page over 2 or 3? Is there a default value? Is this configurable?

Thanks,
Miquèl