From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
To: Md Sadre Alam <quic_mdalam@quicinc.com>
Cc: miquel.raynal@bootlin.com, richard@nod.at, vigneshr@ti.com,
broonie@kernel.org, bbrezillon@kernel.org,
linux-mtd@lists.infradead.org, linux-arm-msm@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org
Subject: Re: [PATCH v3 4/4] spi: spi-qpic-snand: set nandc_offset for ipq9574
Date: Tue, 18 Mar 2025 13:05:19 +0530 [thread overview]
Message-ID: <20250318073519.pgise5vnlu2aha5u@thinkpad> (raw)
In-Reply-To: <20250310120906.1577292-5-quic_mdalam@quicinc.com>
On Mon, Mar 10, 2025 at 05:39:06PM +0530, Md Sadre Alam wrote:
> The BAM block expects NAND register addresses to be computed based on
> the NAND register offset from QPIC base. This value is 0x30000 for
> ipq9574. Update the 'nandc_offset' value in the qcom_nandc_props
> appropriately.
>
> Signed-off-by: Md Sadre Alam <quic_mdalam@quicinc.com>
Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
- Mani
> ---
>
> Change in [v3]
>
> * Added nand_offset for proper address calculation
> for newer Socs
>
> Change in [v2]
>
> * This patch was not part of v2
>
> Change in [v1]
>
> * This patch was not part of v1
>
> drivers/spi/spi-qpic-snand.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/spi/spi-qpic-snand.c b/drivers/spi/spi-qpic-snand.c
> index 8c413a6a5152..85a742e21cf9 100644
> --- a/drivers/spi/spi-qpic-snand.c
> +++ b/drivers/spi/spi-qpic-snand.c
> @@ -1604,6 +1604,7 @@ static void qcom_spi_remove(struct platform_device *pdev)
> static const struct qcom_nandc_props ipq9574_snandc_props = {
> .dev_cmd_reg_start = 0x7000,
> .supports_bam = true,
> + .nandc_offset = 0x30000,
> };
>
> static const struct of_device_id qcom_snandc_of_match[] = {
> --
> 2.34.1
>
--
மணிவண்ணன் சதாசிவம்
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next prev parent reply other threads:[~2025-03-18 7:35 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-10 12:09 [PATCH v3 0/4] QPIC v2 fixes for SDX75 Md Sadre Alam
2025-03-10 12:09 ` [PATCH v3 1/4] mtd: rawnand: qcom: Pass 18 bit offset from QPIC base address to BAM Md Sadre Alam
2025-03-18 7:33 ` Manivannan Sadhasivam
2025-03-20 5:53 ` Md Sadre Alam
2025-03-25 14:32 ` Manivannan Sadhasivam
2025-03-18 14:52 ` Gabor Juhos
2025-03-20 5:59 ` Md Sadre Alam
2025-03-10 12:09 ` [PATCH v3 2/4] mtd: rawnand: qcom: Fix last codeword read in qcom_param_page_type_exec() Md Sadre Alam
2025-03-10 12:09 ` [PATCH v3 3/4] mtd: rawnand: qcom: Fix read len for onfi param page Md Sadre Alam
2025-03-18 7:34 ` Manivannan Sadhasivam
2025-03-10 12:09 ` [PATCH v3 4/4] spi: spi-qpic-snand: set nandc_offset for ipq9574 Md Sadre Alam
2025-03-13 12:59 ` Mark Brown
2025-03-18 7:35 ` Manivannan Sadhasivam [this message]
2025-03-18 14:58 ` Gabor Juhos
2025-03-20 6:10 ` Md Sadre Alam
2025-03-18 7:41 ` [PATCH v3 0/4] QPIC v2 fixes for SDX75 Manivannan Sadhasivam
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