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Peter Anvin" , Ajay Kaher , Alexey Makhalov , Broadcom internal kernel review list , Damien Le Moal , Niklas Cassel , David Airlie , Helge Deller , linux-geode@lists.infradead.org, Olivia Mackall , Herbert Xu , Linus Walleij , Bartosz Golaszewski , Peter Zijlstra , Arnaldo Carvalho de Melo , Namhyung Kim , Mark Rutland , Alexander Shishkin , Jiri Olsa , Ian Rogers , Adrian Hunter , James Clark , Haiyang Zhang , Wei Liu , Dexuan Cui , Sean Christopherson , Paolo Bonzini , Josh Poimboeuf , Pawan Gupta , Pu Wen , Tony Luck , Reinette Chatre , Dave Martin , James Morse , Babu Moger , Tony W Wang-oc , Vitaly Kuznetsov , Andy Lutomirski , Bjorn Helgaas , "Rafael J. Wysocki" , Pavel Machek , Kiryl Shutsemau , Rick Edgecombe , Boris Ostrovsky , Len Brown , Viresh Kumar , Huang Rui , Mario Limonciello , Perry Yuan , K Prateek Nayak , Srinivas Pandruvada , Yazen Ghannam , Guenter Roeck , Artem Bityutskiy , Artem Bityutskiy , Arnd Bergmann , Greg Kroah-Hartman , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Ashok Raj , Hans de Goede , =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= , Rajneesh Bhardwaj , Xi Pardee , Daniel Lezcano , Zhang Rui , Lukasz Luba , xen-devel@lists.xenproject.org Subject: [PATCH v5 00/12] x86/msr: Drop 32-bit MSR interfaces Date: Mon, 26 Oct 2026 14:02:11 +0100 Message-ID: <20261026130223.773129-1-jgross@suse.com> X-Mailer: git-send-email 2.56.0 X-Archived-By: MIME-Version: 1.0 X-Spam-Level: X-Spamd-Result: default: False [-10.80 / 50.00]; SUSE_INTERNAL_BYPASS(-9.00)[]; BAYES_HAM(-3.00)[100.00%]; SUSPICIOUS_RECIPS(1.50)[]; MID_CONTAINS_FROM(1.00)[]; NEURAL_HAM_LONG(-1.00)[-1.000]; NEURAL_HAM_SHORT(-0.20)[-1.000]; MIME_GOOD(-0.10)[text/plain]; RCVD_VIA_SMTP_AUTH(0.00)[]; MIME_TRACE(0.00)[0:+]; TAGGED_RCPT(0.00)[]; TO_DN_SOME(0.00)[]; ARC_NA(0.00)[]; RCVD_TLS_ALL(0.00)[]; DKIM_SIGNED(0.00)[suse.com:s=susede1]; FROM_HAS_DN(0.00)[]; FREEMAIL_CC(0.00)[suse.com,kernel.org,redhat.com,alien8.de,linux.intel.com,zytor.com,broadcom.com,gmx.de,lists.infradead.org,selenic.com,gondor.apana.org.au,infradead.org,arm.com,google.com,intel.com,linaro.org,microsoft.com,hygon.cn,amd.com,zhaoxin.com,oracle.com,roeck-us.net,gmail.com,arndb.de,linuxfoundation.org,bootlin.com,nod.at,ti.com,lists.xenproject.org]; R_RATELIMIT(0.00)[to_ip_from(RLbixyxwsf3a5i7e4ez64ejni4)]; FROM_EQ_ENVFROM(0.00)[]; RCVD_COUNT_TWO(0.00)[2]; TO_MATCH_ENVRCPT_SOME(0.00)[]; RCPT_COUNT_GT_50(0.00)[93]; DBL_BLOCKED_OPENRESOLVER(0.00)[imap1.dmz-prg2.suse.org:helo] X-Spam-Score: -10.80 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20261026_060231_570887_8A3E9B69 X-CRM114-Status: GOOD ( 17.59 ) X-Spam-Score: -2.1 (--) X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux MTD discussion mailing list List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-mtd" X-Spam-Status: No, score=-12.2 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=4.0.1 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-26) on aws-us-west-2-korg-listserv-alma10-1 For accessing the MSR registers on the local CPU, there are 2 types of interfaces: the "modern" 64-bit ones (rdmsrq() etc.) and the 32-bit ones (rdmsr() etc.) which are using the upper and lower 32-bit halves of the 64-bit wide MSR register values. The 32-bit interfaces are not optimal for 3 reasons: - They are based on primitives using 64-bit sized values anyway. - Modern x86 CPUs have added support for MSR access instructions using an immediate value instead of a register for addressing the MSR, while the value is in a 64-bit register. - rdmsr() is a macro storing the upper and lower 32-bit halves in variables specified as macro parameters. This is obscuring variable assignment through a macro. Additionally rdmsrq() is mimicking this pattern by being a macro, too, with the target variable specified as a parameter as well. For those reasons drop the 32-bit interfaces for accessing the x86 MSR registers completely and only use the 64-bit variants. This allows to switch all "high-level" MSR access macros to inline functions in the end. This series will be used as the base for further reorganisation of the MSR access functions, especially for completely inlining the MSR access instructions even with paravirtualization being active. Based on kernel 7.4 as of 2026-10-26. IMHO at least patches 2 and 3 should be applied rather sooner than later in order to avoid new instances of the 32-bit variants of the *_safe() functions creeping in again. Changes in V2: - dropped already applied patches - added patch 1 - rebased Changes in V3: - small fixes in patches 4 and 13 - rebased Changes in V4: - rebased Changes in V5: - patch 9 of V4 has been applied - rebased Juergen Gross (12): x86/cpu: Fix coding style violation x86/msr: Remove wrmsr_safe() x86/msr: Remove rdmsr_safe() drivers/ata: Stop using 32-bit MSR interfaces agp/nvidia: Stop using 32-bit MSR interfaces fbdev/geode: Stop using 32-bit MSR interfaces hw_random/via-rng: Stop using 32-bit MSR interfaces drivers/gpio: Stop using 32-bit MSR interfaces x86/msr: Remove wrmsr() x86/msr: Remove rdmsr() treewide: convert rdmsrq() from a macro to an inline function x86/msr: Simplify some rdmsrq() use cases arch/x86/coco/sev/core.c | 2 +- arch/x86/events/amd/brs.c | 4 +- arch/x86/events/amd/core.c | 8 +-- arch/x86/events/amd/ibs.c | 18 +++---- arch/x86/events/amd/lbr.c | 16 ++---- arch/x86/events/amd/power.c | 8 +-- arch/x86/events/amd/uncore.c | 4 +- arch/x86/events/core.c | 20 ++++---- arch/x86/events/intel/core.c | 15 ++---- arch/x86/events/intel/cstate.c | 5 +- arch/x86/events/intel/ds.c | 2 +- arch/x86/events/intel/knc.c | 10 ++-- arch/x86/events/intel/lbr.c | 25 +++------- arch/x86/events/intel/p4.c | 6 +-- arch/x86/events/intel/p6.c | 4 +- arch/x86/events/intel/pt.c | 12 ++--- arch/x86/events/intel/uncore.c | 6 +-- arch/x86/events/intel/uncore_nhmex.c | 4 +- arch/x86/events/intel/uncore_snb.c | 2 +- arch/x86/events/intel/uncore_snbep.c | 6 +-- arch/x86/events/msr.c | 2 +- arch/x86/events/perf_event.h | 6 +-- arch/x86/events/rapl.c | 6 +-- arch/x86/events/zhaoxin/core.c | 10 ++-- arch/x86/hyperv/hv_apic.c | 9 ++-- arch/x86/hyperv/hv_init.c | 26 +++++----- arch/x86/hyperv/hv_spinlock.c | 2 +- arch/x86/include/asm/apic.h | 7 +-- arch/x86/include/asm/debugreg.h | 6 +-- arch/x86/include/asm/fsgsbase.h | 2 +- arch/x86/include/asm/kvm_host.h | 10 ---- arch/x86/include/asm/msr.h | 39 ++------------- arch/x86/include/asm/paravirt.h | 26 +--------- arch/x86/kernel/apic/apic.c | 14 +++--- arch/x86/kernel/apic/apic_numachip.c | 6 +-- arch/x86/kernel/cet.c | 2 +- arch/x86/kernel/cpu/amd.c | 14 +++--- arch/x86/kernel/cpu/aperfmperf.c | 8 +-- arch/x86/kernel/cpu/bugs.c | 12 ++--- arch/x86/kernel/cpu/bus_lock.c | 8 +-- arch/x86/kernel/cpu/centaur.c | 8 +-- arch/x86/kernel/cpu/common.c | 12 ++--- arch/x86/kernel/cpu/feat_ctl.c | 4 +- arch/x86/kernel/cpu/hygon.c | 4 +- arch/x86/kernel/cpu/intel.c | 6 +-- arch/x86/kernel/cpu/intel_epb.c | 4 +- arch/x86/kernel/cpu/mce/amd.c | 4 +- arch/x86/kernel/cpu/mce/core.c | 8 +-- arch/x86/kernel/cpu/mce/inject.c | 2 +- arch/x86/kernel/cpu/mce/intel.c | 18 +++---- arch/x86/kernel/cpu/mce/p5.c | 8 +-- arch/x86/kernel/cpu/mce/winchip.c | 2 +- arch/x86/kernel/cpu/microcode/intel.c | 2 +- arch/x86/kernel/cpu/mshyperv.c | 6 +-- arch/x86/kernel/cpu/mtrr/amd.c | 4 +- arch/x86/kernel/cpu/mtrr/cleanup.c | 4 +- arch/x86/kernel/cpu/mtrr/generic.c | 32 ++++++------ arch/x86/kernel/cpu/mtrr/mtrr.c | 2 +- arch/x86/kernel/cpu/resctrl/core.c | 2 +- arch/x86/kernel/cpu/resctrl/monitor.c | 4 +- arch/x86/kernel/cpu/resctrl/pseudo_lock.c | 4 +- arch/x86/kernel/cpu/resctrl/rdtgroup.c | 2 +- arch/x86/kernel/cpu/topology.c | 2 +- arch/x86/kernel/cpu/topology_amd.c | 4 +- arch/x86/kernel/cpu/transmeta.c | 8 +-- arch/x86/kernel/cpu/tsx.c | 10 ++-- arch/x86/kernel/cpu/umwait.c | 2 +- arch/x86/kernel/cpu/zhaoxin.c | 4 +- arch/x86/kernel/fpu/core.c | 2 +- arch/x86/kernel/hpet.c | 2 +- arch/x86/kernel/kvm.c | 2 +- arch/x86/kernel/mmconf-fam10h_64.c | 6 +-- arch/x86/kernel/process.c | 4 +- arch/x86/kernel/process_64.c | 14 +++--- arch/x86/kernel/shstk.c | 8 +-- arch/x86/kernel/traps.c | 4 +- arch/x86/kernel/tsc.c | 2 +- arch/x86/kernel/tsc_msr.c | 6 +-- arch/x86/kernel/tsc_sync.c | 6 +-- arch/x86/kvm/msrs.c | 2 +- arch/x86/kvm/svm/pmu.c | 4 +- arch/x86/kvm/svm/svm.c | 6 +-- arch/x86/kvm/vmx/main.c | 2 +- arch/x86/kvm/vmx/nested.c | 4 +- arch/x86/kvm/vmx/pmu_intel.c | 8 +-- arch/x86/kvm/vmx/sgx.c | 6 +-- arch/x86/kvm/vmx/tdx.c | 2 +- arch/x86/kvm/vmx/vmx.c | 40 +++++++-------- arch/x86/kvm/x86.c | 6 +-- arch/x86/lib/insn-eval.c | 6 +-- arch/x86/lib/msr-smp.c | 2 +- arch/x86/mm/pat/memtype.c | 2 +- arch/x86/pci/amd_bus.c | 8 +-- arch/x86/platform/olpc/olpc-xo1-rtc.c | 6 +-- arch/x86/platform/olpc/olpc-xo1-sci.c | 2 +- arch/x86/power/cpu.c | 10 ++-- arch/x86/realmode/init.c | 2 +- arch/x86/virt/hw.c | 8 +-- arch/x86/virt/svm/sev.c | 22 ++++---- arch/x86/virt/vmx/tdx/tdx.c | 2 +- arch/x86/xen/suspend.c | 2 +- drivers/acpi/processor_perflib.c | 2 +- drivers/ata/pata_cs5535.c | 24 ++++----- drivers/ata/pata_cs5536.c | 17 +++---- drivers/char/agp/nvidia-agp.c | 32 ++++++------ drivers/char/hw_random/via-rng.c | 29 +++++------ drivers/cpufreq/acpi-cpufreq.c | 8 +-- drivers/cpufreq/amd-pstate.c | 4 +- drivers/cpufreq/e_powersaver.c | 20 ++++---- drivers/cpufreq/intel_pstate.c | 28 +++++------ drivers/cpufreq/longhaul.c | 12 ++--- drivers/cpufreq/longrun.c | 16 +++--- drivers/cpufreq/powernow-k7.c | 10 ++-- drivers/cpufreq/powernow-k8.c | 8 +-- drivers/cpufreq/speedstep-centrino.c | 4 +- drivers/cpufreq/speedstep-lib.c | 14 +++--- drivers/edac/amd64_edac.c | 6 +-- drivers/edac/intel-bff.c | 4 +- drivers/gpio/gpio-cs5535.c | 10 ++-- drivers/hv/mshv_vtl_main.c | 2 +- drivers/hwmon/hwmon-vid.c | 4 +- drivers/idle/intel_idle.c | 26 +++++----- drivers/misc/cs5535-mfgpt.c | 6 +-- drivers/mtd/nand/raw/cs553x_nand.c | 6 +-- drivers/platform/x86/intel/ifs/load.c | 10 ++-- drivers/platform/x86/intel/ifs/runtest.c | 8 +-- drivers/platform/x86/intel/pmc/cnp.c | 2 +- .../intel/speed_select_if/isst_if_mbox_msr.c | 6 +-- .../intel/speed_select_if/isst_tpmi_core.c | 2 +- drivers/platform/x86/intel_ips.c | 20 ++++---- drivers/powercap/intel_rapl_msr.c | 2 +- drivers/thermal/intel/intel_hfi.c | 8 +-- drivers/thermal/intel/therm_throt.c | 22 ++++---- drivers/thermal/intel/x86_pkg_temp_thermal.c | 6 +-- drivers/video/fbdev/geode/display_gx.c | 8 +-- drivers/video/fbdev/geode/gxfb_core.c | 2 +- drivers/video/fbdev/geode/lxfb_ops.c | 50 +++++++++---------- drivers/video/fbdev/geode/suspend_gx.c | 24 +++++---- drivers/video/fbdev/geode/video_gx.c | 8 +-- include/linux/cs5535.h | 10 ++-- 140 files changed, 567 insertions(+), 685 deletions(-) -- 2.56.0 ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/