* RE: [Fwd: cfi_cmdset_0001.c: do_write_buffer bug]
@ 2002-06-20 12:40 John Hall
2002-06-20 12:45 ` David Woodhouse
2002-07-02 10:10 ` Joakim Tjernlund
0 siblings, 2 replies; 9+ messages in thread
From: John Hall @ 2002-06-20 12:40 UTC (permalink / raw)
To: David Woodhouse; +Cc: joakim.tjernlund, linux-mtd
On 20 June 2002 13:25 David Woodhouse <dwmw2@infradead.org> wrote:
> John.Hall@optionexist.co.uk said:
> > Not yet. We've spoken to Intel and they acknowledge there might be
> > a problem, but we're waiting for them to get back to us.
> OK, I suspect what we want to do is something like...
>
> Send WriteToBuffer command.
> Poll for a little while for chips to become ready.
> If neither chip is ready, repeat.
> If only one chip is ready, abort the WriteToBuffer. Send a
> zero-length (or one-byte) buffer and then something other than a
> WriteConfirm command, to abort the write. Clear the resulting
> 'Invalid Command/ Sequence' error bits which will get set, and start
> again.
Possibly. We're going to wait and see what Intel say, and then submit a
patch if needed.
Regards,
John Hall
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [Fwd: cfi_cmdset_0001.c: do_write_buffer bug]
2002-06-20 12:40 [Fwd: cfi_cmdset_0001.c: do_write_buffer bug] John Hall
@ 2002-06-20 12:45 ` David Woodhouse
2002-07-02 10:10 ` Joakim Tjernlund
1 sibling, 0 replies; 9+ messages in thread
From: David Woodhouse @ 2002-06-20 12:45 UTC (permalink / raw)
To: John Hall; +Cc: joakim.tjernlund, linux-mtd
John.Hall@optionexist.co.uk said:
> Possibly. We're going to wait and see what Intel say, and then submit
> a patch if needed.
OK, thanks.
--
dwmw2
^ permalink raw reply [flat|nested] 9+ messages in thread
* RE: [Fwd: cfi_cmdset_0001.c: do_write_buffer bug]
2002-06-20 12:40 [Fwd: cfi_cmdset_0001.c: do_write_buffer bug] John Hall
2002-06-20 12:45 ` David Woodhouse
@ 2002-07-02 10:10 ` Joakim Tjernlund
1 sibling, 0 replies; 9+ messages in thread
From: Joakim Tjernlund @ 2002-07-02 10:10 UTC (permalink / raw)
To: John Hall; +Cc: linux-mtd
Hi John
Has Intel responded yet? If yes, do they have a fix?
Jocke
>
>
> On 20 June 2002 13:25 David Woodhouse <dwmw2@infradead.org> wrote:
>
> > John.Hall@optionexist.co.uk said:
> > > Not yet. We've spoken to Intel and they acknowledge there might be
> > > a problem, but we're waiting for them to get back to us.
>
> > OK, I suspect what we want to do is something like...
> >
> > Send WriteToBuffer command.
> > Poll for a little while for chips to become ready.
> > If neither chip is ready, repeat.
> > If only one chip is ready, abort the WriteToBuffer. Send a
> > zero-length (or one-byte) buffer and then something other than a
> > WriteConfirm command, to abort the write. Clear the resulting
> > 'Invalid Command/ Sequence' error bits which will get set, and start
> > again.
>
> Possibly. We're going to wait and see what Intel say, and then submit a
> patch if needed.
>
> Regards,
> John Hall
>
> ______________________________________________________
> Linux MTD discussion mailing list
> http://lists.infradead.org/mailman/listinfo/linux-mtd/
>
^ permalink raw reply [flat|nested] 9+ messages in thread
* RE: [Fwd: cfi_cmdset_0001.c: do_write_buffer bug]
@ 2002-06-20 11:13 John Hall
2002-06-20 12:25 ` David Woodhouse
0 siblings, 1 reply; 9+ messages in thread
From: John Hall @ 2002-06-20 11:13 UTC (permalink / raw)
To: joakim.tjernlund; +Cc: linux-mtd
Joakim Tjernlund wrote:
> > I was going to report exactly the same problem this morning. We have
> > an additional problem however. We currently have two Intel Strata
> > Flash parts in 16 bit mode to form a single 32 bit interface to a
> > StrongARM SA1110. We have found that sometimes, one chip returns
> > ready, but the second does not. You are then in a Catch-22 since
> > you're supposed to re-issue the write command to the one that's not
> > ready but cannot to the one that is ready.
> Have made any progress on this? I too have 2 Strata Flash in 16-bit
> mode to form a 32-bit interface. I have yet to encounter this problem
> though.
Not yet. We've spoken to Intel and they acknowledge there might be a
problem, but we're waiting for them to get back to us.
john
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [Fwd: cfi_cmdset_0001.c: do_write_buffer bug]
2002-06-20 11:13 John Hall
@ 2002-06-20 12:25 ` David Woodhouse
0 siblings, 0 replies; 9+ messages in thread
From: David Woodhouse @ 2002-06-20 12:25 UTC (permalink / raw)
To: John Hall; +Cc: joakim.tjernlund, linux-mtd
John.Hall@optionexist.co.uk said:
> Not yet. We've spoken to Intel and they acknowledge there might be a
> problem, but we're waiting for them to get back to us.
OK, I suspect what we want to do is something like...
Send WriteToBuffer command.
Poll for a little while for chips to become ready.
If neither chip is ready, repeat.
If only one chip is ready, abort the WriteToBuffer. Send a zero-length
(or one-byte) buffer and then something other than a WriteConfirm
command, to abort the write. Clear the resulting 'Invalid Command/
Sequence' error bits which will get set, and start again.
--
dwmw2
^ permalink raw reply [flat|nested] 9+ messages in thread
* RE: [Fwd: cfi_cmdset_0001.c: do_write_buffer bug]
@ 2002-06-17 15:01 John Hall
2002-06-19 10:40 ` Joakim Tjernlund
0 siblings, 1 reply; 9+ messages in thread
From: John Hall @ 2002-06-17 15:01 UTC (permalink / raw)
To: linux-mtd; +Cc: Andrey Filippov
On Sun 16/06/2002, Andrey Filippov <andrey@elphel.com> wrote:
> Working with Intel TE28F640J3A and Axis ETRAX100LX processor I ran
> over a bug in cfi_cmdset_0001.c: do_write_buffer. It checks ready
> state 20 times but does not resend Write-to-Buffer command (E8) before
> new checks. So if it was not ready first time it will never be ready
> later.
I was going to report exactly the same problem this morning. We have an
additional problem however. We currently have two Intel Strata Flash
parts in 16 bit mode to form a single 32 bit interface to a StrongARM
SA1110. We have found that sometimes, one chip returns ready, but the
second does not. You are then in a Catch-22 since you're supposed to
re-issue the write command to the one that's not ready but cannot to the
one that is ready.
Has anyone else come across this problem?
Regards,
John Hall
^ permalink raw reply [flat|nested] 9+ messages in thread
* RE: [Fwd: cfi_cmdset_0001.c: do_write_buffer bug]
2002-06-17 15:01 John Hall
@ 2002-06-19 10:40 ` Joakim Tjernlund
0 siblings, 0 replies; 9+ messages in thread
From: Joakim Tjernlund @ 2002-06-19 10:40 UTC (permalink / raw)
To: John Hall, linux-mtd; +Cc: Andrey Filippov
Hi John
Have made any progress on this? I too have 2 Strata Flash in 16-bit mode to form a 32-bit
interface. I have yet to encounter this problem though.
Jocke
>
> On Sun 16/06/2002, Andrey Filippov <andrey@elphel.com> wrote:
>
> > Working with Intel TE28F640J3A and Axis ETRAX100LX processor I ran
> > over a bug in cfi_cmdset_0001.c: do_write_buffer. It checks ready
> > state 20 times but does not resend Write-to-Buffer command (E8) before
> > new checks. So if it was not ready first time it will never be ready
> > later.
>
> I was going to report exactly the same problem this morning. We have an
> additional problem however. We currently have two Intel Strata Flash
> parts in 16 bit mode to form a single 32 bit interface to a StrongARM
> SA1110. We have found that sometimes, one chip returns ready, but the
> second does not. You are then in a Catch-22 since you're supposed to
> re-issue the write command to the one that's not ready but cannot to the
> one that is ready.
>
> Has anyone else come across this problem?
>
> Regards,
> John Hall
>
> ______________________________________________________
> Linux MTD discussion mailing list
> http://lists.infradead.org/mailman/listinfo/linux-mtd/
>
^ permalink raw reply [flat|nested] 9+ messages in thread
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Thread overview: 9+ messages (download: mbox.gz follow: Atom feed
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2002-06-20 12:40 [Fwd: cfi_cmdset_0001.c: do_write_buffer bug] John Hall
2002-06-20 12:45 ` David Woodhouse
2002-07-02 10:10 ` Joakim Tjernlund
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2002-06-20 11:13 John Hall
2002-06-20 12:25 ` David Woodhouse
2002-06-17 15:01 John Hall
2002-06-19 10:40 ` Joakim Tjernlund
[not found] <3D0CC18A.8080002@elphel.com>
2002-06-16 17:03 ` Andrey Filippov
2002-06-16 17:16 ` David Woodhouse
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