Re: Compile problems

[David Woodhouse <dwmw2@infradead.org>]

jgg@deltatee.com said:
>  Having not looked at it, shouldn't the DOC access be regulated to a
> lower level driver, like we have for the other flash stuff? If I were
> to slap a DOC on an ARM board here it would probably have quite
> different access (32 bit for one thing).  

Urgh. You might be right. Which is a shame because the current map setup 
doesn't handle the type of access that the DiskOnChip requires very nicely. 
Where it's reading 512 consecutive bytes out of the same port on the ASIC, 
it'd be 512 indirect function calls in a tight loop. Maybe we need an extra 
method in the map object if we're going to do that.

Lets try to avoid it for a while - presumably anyone who adds a DiskOnChip 
to an ARM system will do the same thing, so the ReadDOC and WriteDOC macros 
can be defined accordingly for ARM systems, and we'll bury our head in the 
sand for a little longer until some nutter comes up with a second method 
for a given architecture and we can no longer ifdef it. :)


jgg@deltatee.com said:
> I did add two new things to the struct map to make this possible:
>   unsigned bus_width;

Good point.

>   unsigned long bank_size;   // Bytes in a bank. size = bank_size*bank_count 

> So if you have less than 4 meg of chips you end up with spaces between
> them and the driver has to advoid them and probe differently.  

I have the same - 16Mb at 0x0, 16Mb at 0x2000000. But it's aliases, not 
spaces between them - just to make it more interesting. (And I was told it 
wouldn't be like that, so when I erased the 'second' chip at 0x1000000 I 
was actually erasing the firmware... :) 

I changed the VM setup to present them to the CPU contiguously. If that wasn't
possible, I'd have done the mask-and-shift necessary in the map driver. Is
it really necessary for the user to know about it? Surely it's just a
physical detail of the wiring?




--
dwmw2




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