Re: GPMI iMX6ull timeout on DMA

Christian Eggers
2021-10-09T06:34:11Z

On Friday, 8 October 2021, 14:08:01 CEST, Stefan Riedmüller wrote:
> On Fri, 2021-10-08 at 11:55 +0200, Christian Eggers wrote:
> > @Stefan Riedmueller: Are you willing to commit this upstream?
>
> Yes sure, I can prepare a patch beginning of next week.
> BTW, we have seen these DMA timeout issues on the i.MX6 SOCs as well. So this
> fix is not only for the i.MX 6ULL.

Current status:

- If have entirely removed the following part:
if (GPMI_IS_MX6(this))
/*
* Set the default value for the gpmi clock.
*
* If you want to use the ONFI nand which is in the
* Synchronous Mode, you should change the clock as you need.
*/
clk_set_rate(r->clock[0], 22000000);

- I applied your patch:
https://git.phytec.de/linux-mainline/commit/?h=v5.10.48-phy&id=866939ea8110764d9c12af960d746e2f7f5debe3

Last night I made a cycle test with a phyCORE i.MX6ULL. Over 1700 cycles were successful!

regards
Christian