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* Re: M-Systems Disk-On-Chip driver
@ 2000-06-13 14:26 void void
  0 siblings, 0 replies; 6+ messages in thread
From: void void @ 2000-06-13 14:26 UTC (permalink / raw)
  To: mtd

adi@adis.on.ca said:

> Hmmm... So are there some really easy instructions on how to
> build the driver?

good question!

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^ permalink raw reply	[flat|nested] 6+ messages in thread
* Re: M-Systems Disk-On-Chip driver
@ 2000-06-13  8:33 void void
  0 siblings, 0 replies; 6+ messages in thread
From: void void @ 2000-06-13  8:33 UTC (permalink / raw)
  To: mtd

Tuesday, June 13, 2000, 12:34:54 PM, you wrote:

AL> Hi,

AL> Is the kernel driver for the doc devices working? I haven't tried mtd in
a
AL> while but I'd really like to replace the IGEL driver with something open
AL> source.

Hello.
I tried DOC2000 with mtd on 2.3.99-pre9 kernel.
It seems that dirver works properly, but I can't boot from DOC.
I can read from and write to /dev/nftlXX, but I can't boot :(
BIOS of my mb (Advantech PCA-6135L) can not find boot
device. On the same hardware M-Systems' driver allow me
to boot from DOC2000, but it works with kernel 2.2.XX, not 2.3.XX.
I'd like replace IGEL driver too, but I don't sure
it's possible now...
--
Sincerely,
Dmitry Kargapolov, ICQ 54000305, dk@gentex.ru

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^ permalink raw reply	[flat|nested] 6+ messages in thread
* Re: Common Flash Interface probe code.
@ 2000-06-13  5:53 Jason Gunthorpe
  2000-06-13  6:34 ` M-Systems Disk-On-Chip driver Adi Linden
  0 siblings, 1 reply; 6+ messages in thread
From: Jason Gunthorpe @ 2000-06-13  5:53 UTC (permalink / raw)
  To: David Woodhouse; +Cc: mtd


On Mon, 12 Jun 2000, David Woodhouse wrote:

> Anyone with memory-mapped CFI-compliant NOR flash, especially if it's not 
> in 16-bit mode like the one I'm testing on - could you test this probe code 

Nifty.. I have a FLASH SIMM at work which AFAIK is 32bits wide, with 4
8-bit CFI chips (I hope) interleaved and then another 4 cascaded at the
end of that set. So the bottom two address lines and top address line
select which of the 8 chips and the rest of them index the memory.

You should be able do two things with this sort of flash configuration:
  1) Small erase sectors and slower 8/16bit IO - this is done by abusing
     the address lines and indexing 1 chip at a time.
  2) Large erase sectors and fast 32bit IO, including 4 chip parallel
     writes.

It is hanging right off the CPU's main 32-bit memory bus with a chipselect
controlling a 16meg window to access it.

Assuming the flash is CFI it looks like your detector will find the first
4 chips, but not the second set.

> #ifdef __arm__
> /* Shoot me. Better still, shoot rmk. dwmw2 */
> #undef writeb
> #undef writew
> #undef readb
> #undef readw
> #define readb(l) (*(unsigned char *)(l))
> #define writeb(c,l)  do {*((unsigned char *)(l)) = (c);} while (0)
> #define readw(l) (*(unsigned short *)(l))
> #define writew(c,l)  do {*((unsigned short *)(l)) = (c);} while (0)
> /* It's OK. You can look back now. */
> #endif /* __arm__ */

Wots up with this? Some of the ARM ports have 'interesting' IO..

Jason



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^ permalink raw reply	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2000-06-13 14:28 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2000-06-13 14:26 M-Systems Disk-On-Chip driver void void
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2000-06-13  8:33 void void
2000-06-13  5:53 Common Flash Interface probe code Jason Gunthorpe
2000-06-13  6:34 ` M-Systems Disk-On-Chip driver Adi Linden
2000-06-13  7:44   ` David Woodhouse
2000-06-13 13:48     ` Adi Linden
2000-06-13 14:28       ` David Woodhouse

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