From: David Vrabel <dvrabel@arcom.co.uk>
To: mtd@infradead.org
Subject: Intel Ext. 2_by_8() routines
Date: Mon, 31 Jul 2000 10:48:19 +0100 [thread overview]
Message-ID: <39854B63.4203ACB@arcom.co.uk> (raw)
Hi,
I've added some *2_by_8() routines for the Intel Extended Command Set
(cfi_cmdset_0001.c).
cfi_intelext_setup() decides which ones to use based on the interleave.
Also, the erase block size is set from the CFI info. I've used the info
from the first erase block and assumed that they're all the same size
since MTD doesn't appear to support different erase block sizes.
This stuff has been tested on an Arcom Control Systems SBC-MediaGX (a
flash chip mapping for which has also been added).
Those of you with chips in x16 mode might like to check that the correct
routines and are selected.
David Vrabel
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reply other threads:[~2000-07-31 9:45 UTC|newest]
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