Re: Supported flash memory

[Kenneth Johansson <kenneth.johansson@inn.ericsson.se>]

David Woodhouse wrote:

> Russ.Dill@asu.edu said:
> >  I've noticed LART connects address and data lines to flash in
> > positions most convienent to route. Does this break any CFI
> > functionality?
>
> What do you mean? It's generally considered quite rude for hardware
> designers to connect nets to _completely_ random places on the chips,
> although sometimes it wouldn't really surprise me.
>

Well with SRAM you can intercange any data pin with another data pin and
likewise with the adress bus and nothing would notice. Doing this with ROM or
FLASH makes things quite interesting. This would mean that anything trying to
program the device has to do translation.

If you get random routing to simplify layout to work it would probably qualify
for the nobel price.




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