mtd_info_t.erasesize

mtd_info_t.erasesize

[Kári Davíðsson]

Hi,

When I issue an erase command, e.g. erase /dev/mtd0 0x10000 1
I get the follwing output :

Erase Unit Size 0x2000, Erase Total 100 Units
Performing Flash Erase of length 8192 at offset 0x10000MTD_ioctl
MTD_ioctl
MTD : 5
Performing Flash Erase of length 8192 at offset 0x12000MTD_ioctl
MTD_ioctl
MTD : 5
Performing Flash Erase of length 8192 at offset 0x14000MTD_ioctl
MTD_ioctl
MTD : 5
Performing Flash Erase of length 8192 at offset 0x16000MTD_ioctl
MTD_ioctl
MTD : 5
Performing Flash Erase of length 8192 at offset 0x18000MTD_ioctl
MTD_ioctl
MTD : 5
Performing Flash Erase of length 8192 at offset 0x1a000MTD_ioctl
MTD_ioctl
MTD : 5
Performing Flash Erase of length 8192 at offset 0x1c000MTD_ioctl
MTD_ioctl
MTD : 5
Performing Flash Erase of length 8192 at offset 0x1e000MTD_ioctl
MTD_ioctl
MTD : 5

What bugs me here is that an sector of size 0x10000 (64KB) is erased
in 8 erase calls to the flash chip sector, basically making the life of
the 
flash chip 1/8th of what it should be.
While 8k sector size is correct for the first 8 sectors on the device
(it is bb cfi flash from intel), it is certainly not correct for the
rest (4MB - 8KB of the device).

Shouldn't the device geometry be exported through the mtd_info_t
structure
or am I missing something obvious (which is not unlikely 8-) )...

Regards,

K.D.


To unsubscribe, send "unsubscribe mtd" to majordomo@infradead.org

Re: mtd_info_t.erasesize

[Alice Hennessy]

Kári Davíðsson wrote:

> Hi,
>
> When I issue an erase command, e.g. erase /dev/mtd0 0x10000 1
> I get the follwing output :
>
> Erase Unit Size 0x2000, Erase Total 100 Units
> Performing Flash Erase of length 8192 at offset 0x10000MTD_ioctl
> MTD_ioctl
> MTD : 5
> Performing Flash Erase of length 8192 at offset 0x12000MTD_ioctl
> MTD_ioctl
> MTD : 5
> Performing Flash Erase of length 8192 at offset 0x14000MTD_ioctl
> MTD_ioctl
> MTD : 5
> Performing Flash Erase of length 8192 at offset 0x16000MTD_ioctl
> MTD_ioctl
> MTD : 5
> Performing Flash Erase of length 8192 at offset 0x18000MTD_ioctl
> MTD_ioctl
> MTD : 5
> Performing Flash Erase of length 8192 at offset 0x1a000MTD_ioctl
> MTD_ioctl
> MTD : 5
> Performing Flash Erase of length 8192 at offset 0x1c000MTD_ioctl
> MTD_ioctl
> MTD : 5
> Performing Flash Erase of length 8192 at offset 0x1e000MTD_ioctl
> MTD_ioctl
> MTD : 5
>
> What bugs me here is that an sector of size 0x10000 (64KB) is erased
> in 8 erase calls to the flash chip sector, basically making the life of
> the
> flash chip 1/8th of what it should be.
> While 8k sector size is correct for the first 8 sectors on the device
> (it is bb cfi flash from intel), it is certainly not correct for the
> rest (4MB - 8KB of the device).
>
> Shouldn't the device geometry be exported through the mtd_info_t
> structure
> or am I missing something obvious (which is not unlikely 8-) )...
>
> Regards,
>
> K.D.
>
> To unsubscribe, send "unsubscribe mtd" to majordomo@infradead.org

Well,

I think you are the first one to use an Intel CFI chip that has different
erasesizes.
The logic to handle different erase sizes is in the cfi_cmdset_0002.c file
which handles
the AMD chips but not in the cfi_cmdset_0001.c for Intel chips as yet.
Does the Intel chip give the correct order of the erase regions in the
query to match the order in the flash?  Special
code had to be added for the AMD chips to figure out the correct order of
the erase regions on the chip.

Alice



To unsubscribe, send "unsubscribe mtd" to majordomo@infradead.org

RE: mtd_info_t.erasesize

[Kári Davíðsson]

> -----Original Message-----
> From: Alice Hennessy [mailto:ahennessy@mvista.com]
> Sent: 22. mars 2001 00:56
> To: Kári Davíðsson
> Cc: mtd@infradead.org; ahennessy@mvista.com
> Subject: Re: mtd_info_t.erasesize
> 
> Well,
> 
> I think you are the first one to use an Intel CFI chip that 
> has different
> erasesizes.

o.k.

> The logic to handle different erase sizes is in the 

Yes but I do not totally agree with that logic. It assumes that
the erasesize is the size of the biggest sector in the flashdevice.

I can only see two ways around that, either make the application aware
of
the diffrent erase_size region through the mtd_info_t structure or
make the ioctl(fd, MEMERASE,...) return where the last erase call ended,
e.g.

while(0 != einfo.length){
	int erased;
	ioctl(fd, MEMERASE, &einfo, &erased);
	einfo.start+=erased;
	einfo.length-=erased;
}

> cfi_cmdset_0002.c file
> which handles
> the AMD chips but not in the cfi_cmdset_0001.c for Intel chips as yet.
> Does the Intel chip give the correct order of the erase regions in the
> query to match the order in the flash?  Special
> code had to be added for the AMD chips to figure out the 
> correct order of
> the erase regions on the chip.

Well it seems to export the erase regions correctly. I have a small
patch that
I wan't to test better before I post it here to the cfi_cmdset_0001.c
that identifies
the erase regions correctly.

> 
> Alice

K.D.


To unsubscribe, send "unsubscribe mtd" to majordomo@infradead.org

Re: mtd_info_t.erasesize

[David Woodhouse]

kd@flaga.is said:
>  Yes but I do not totally agree with that logic. It assumes that the
> erasesize is the size of the biggest sector in the flashdevice.

The actual erase sizes are listed in the struct mtd_info. They're not yet 
exported to userspace. An ioctl to do that would be useful. 

--
dwmw2




To unsubscribe, send "unsubscribe mtd" to majordomo@infradead.org