Re: Power blackouts and brownouts

[Vipin Malik <vipin.malik@daniel.com>]

Joakim Tjernlund wrote:

> -----Original Message-----
> From: owner-mtd@infradead.org [mailto:owner-mtd@infradead.org]On Behalf
>
> Well, I haven't seen any flash chips without a reset line, not to say that
> they aren't out there.
>
> With a flash chip *with* a reset line, and one which is connected to the
> system reset, and assuming that the reset gets asserted in a power down, up,
> and brown condition, then everything is ok.
>
> <snip>
>
> hmm, do you mean that reset has to asserted at power DOWN as well in order
> for JFFS2 FS to manage its FS? How do you manage that when someone pulls
> the power cable?
>
>          Jocke

No, but most well designed embedded systems will assert the reset line both on
power
up AND down. Actually, direction does not really matter. Reset is asserted when
the
power rail is out of spec, which will happen (due to the laws of physics), both
on up and down.

You wan't the reset line asserted on power down also, else the processor may
"wander off"
into the weeds and overwrite battery backed RAM or other such stuff if present.

I don't think that JFFS(2) *require* you to assert the reset line (processor or
flash) on power down.

Vipin




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