Re: Erasebug on AMD flashes

[David Vrabel <dvrabel@arcom.com>]

dkey wrote:
> 
> we are using jffs2 on the dbox2 and AMD flash chips, but since rev. 1.96 of 
> cfi_cmdset_0002.c we can't erase the flashes. rev. 1.94 works without 
> problems.

"since 1.96" doesn't make sense.  Any breakage would be from 1.95.

> here are some debug infos, tell me if you need more!

Part numbers of the flash chips and their configuration (interleaved etc.).

> would be please if anybody can take a look over the code or revert revision of 
> cfi_cmdset_0002.c to 1.94.

There's no reason why you can't revert to 1.94 yourself.

FWIW, I'm now of the opinion that chip_status() is definately broken for 
interleaved chips and probably cannot be made to work without ending up 
with a mess.

I would suggest using the data polling algorithm instead (where applicable).

Also, ignoring the internal flash timeout (DQ5 toggling) and instead 
relying on the software timeout might be acceptable.  However, a 
repeatedly suspended erase keeps getting its software timeout extended 
and thus there is a possibility of the software timeout never occuring. 
  Hmmm.  An internal timeout requires a chip reset and thus we can't 
actually suspend an internally timed-out erase so the software timeout 
won't be extended.

David Vrabel
-- 
David Vrabel, Design Engineer

Arcom, Clifton Road           Tel: +44 (0)1223 411200 ext. 3233
Cambridge CB1 7EA, UK         Web: http://www.arcom.com/