[PATCH] command function for nand flash through IDE

[PATCH] command function for nand flash through IDE

[William J Beksi]

[-- Attachment #1: Type: text/plain, Size: 233 bytes --]

Hi,
This driver includes command and select chip functions specifically for  
accessing nand flash through an IDE port. Should be useful for anyone 
developing and testing on a PC. It works with the latest MTD snapshot.

-- 
William

[-- Attachment #2: ide.c --]
[-- Type: text/x-c, Size: 5375 bytes --]

/*
 *  drivers/mtd/nand/ide.c
 *
 *  Copyright (C) 2004 William J Beksi <wjbeksi@users.sourceforge.net> 
 *
 *  Derived from drivers/mtd/nand/spia.c
 *   Copyright (C) 2000 Steven J. Hill <sjhill@realitydiluted.com>
 *
 *  $Id: ide.c,v 1.18 2004/12/07 05:17:46 wjbeksi Exp $
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License version 2 as
 *  published by the Free Software Foundation.
 *
 *  Overview:
 *   This device driver allows a NAND flash device to be accessed from
 *   an IDE interface.  
 */

#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/module.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/partitions.h>
#include <linux/delay.h>
#include <asm/io.h>

/*
 * IDE MTD structure
 */
static struct mtd_info *ide_mtd = NULL;

/*
 * Values specific to the IDE
 */
#define BASEPORT1 0x1F0		/* IDE1 NAND flash I/O base address */
#define BASEPORT2 0x170		/* IDE2 NAND flash I/O base address */

#define IDE_IO_BASE	BASEPORT1

/*
 * Define partitions for flash device
 */
const static struct mtd_partition partition_info[] = {
    { 
		.name   = "IDE flash partition 1", 
		.offset = 0,  
		.size   = 3*1024*1024 
	},
	{
		.name   = "IDE flash partition 2",
		.offset = 3*1024*1024,
		.size   = 3*1024*1024
	}
};
#define NUM_PARTITIONS  2 

/*
 * IDE specific command function
 */
static void nand_command(struct mtd_info *mtd, unsigned command, int column, int page_addr)
{
	register struct nand_chip *this = mtd->priv;
	unsigned int    ide_io_addr_1    = (unsigned int) this->IO_ADDR_R+1;
	unsigned int    ide_io_addr_2    = (unsigned int) this->IO_ADDR_R+2;

	/*
	 * Write out the command to the device
	 */
	if (command == NAND_CMD_SEQIN) {
		int readcmd;

		if (column >= mtd->oobblock) {
			/* OOB area */
			column -= mtd->oobblock;
			readcmd = NAND_CMD_READOOB;
		} else if (column < 256) {
			/* First 256 bytes --> READ0 */
			readcmd = NAND_CMD_READ0;
		} else {
			column -= 256;
			readcmd = NAND_CMD_READ1;
		}
		outb(readcmd, ide_io_addr_1);
	}
	outb(command, ide_io_addr_1);

	if (column != -1 || page_addr != -1) {
		/* Serially input address */
		if (column != -1) {
			/* Adjust columns for 16 bit buswidth */
			if (this->options & NAND_BUSWIDTH_16)
				column >>= 1;
			outb(column, ide_io_addr_2);
		}
		if (page_addr != -1) {
			outb((unsigned char) (page_addr & 0xff), ide_io_addr_2);
			outb((unsigned char) ((page_addr >> 8) & 0xff), ide_io_addr_2);
			/* One more address cycle for devices > 32MiB */
			if (this->chipsize > (32 << 20))
				outb((unsigned char) ((page_addr >> 16) & 0x0f),
						ide_io_addr_2);
		}
	}
	
	/* 
	 * Program and erase have their own busy handlers status and sequential 
	 * in needs no delay
	 */
	switch (command) {
			
	case NAND_CMD_PAGEPROG:
	case NAND_CMD_ERASE1:
	case NAND_CMD_ERASE2:
	case NAND_CMD_SEQIN:
	case NAND_CMD_STATUS:
		return;

	case NAND_CMD_RESET:
		if (this->dev_ready)	
			break;
		udelay(this->chip_delay);
		outb(NAND_CMD_STATUS, ide_io_addr_1);
		while (!(this->read_byte(mtd) & 0x40));
		return;

	/* This applies to read commands */	
	default:
		/* 
		 * If we don't have access to the busy pin, we apply the given
		 * command delay
		 */
		if (!this->dev_ready) {
			udelay(this->chip_delay);
			return;
		}	
	}
	
	/* 
	 * Apply this short delay always to ensure that we do wait tWB in
	 * any case on any machine
	 */
	ndelay(100);
	/* Wait until command is processed */
	while (!this->dev_ready(mtd));
}

static void nand_select_chip(struct mtd_info *mtd, int chip)
{
	nand_command(mtd, NAND_CMD_RESET, -1, -1);
}

/*
 * Main initialization routine
 */
int __init ide_init(void)
{
	struct nand_chip *this;

	/* Allocate memory for MTD device structure and private data */
	ide_mtd = kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip), GFP_KERNEL);
	if (!ide_mtd) {
		printk("Unable to allocate IDE NAND MTD structure\n");
		return -ENOMEM;
	}

	/* Get pointer to private data */
	this = (struct nand_chip *) (&ide_mtd[1]);

	/* Initialize structures */
	memset((char *) ide_mtd, 0, sizeof(struct mtd_info));
	memset((char *) this, 0, sizeof(struct nand_chip));

	/* Link the private data with the MTD structure */
	ide_mtd->priv = this;

	/* Set address of NAND IO lines */
	this->IO_ADDR_R  = (void __iomem *) IDE_IO_BASE;
	this->IO_ADDR_W  = (void __iomem *) IDE_IO_BASE;

	/* Set command function for IDE */
	this->cmdfunc = nand_command;
	/* Set select chip function for IDE */
	this->select_chip = nand_select_chip;
	/* 20 us command delay time */
	this->chip_delay = 20;
	/* Set the ECC generator mode */
	this->eccmode = NAND_ECC_SOFT;

	/* Scan to find existance of the device */
	if (nand_scan(ide_mtd, 1)) {
		kfree(ide_mtd);
		return -ENXIO;
	}

	/* Register the partitions */
	add_mtd_partitions(ide_mtd, partition_info, NUM_PARTITIONS);

	/* Return happy */
	return 0;
}
module_init(ide_init);

/*
 * Clean up routine
 */
#ifdef MODULE
static void __exit ide_cleanup (void)
{
	/* Release resources, unregister the device */
	nand_release(ide_mtd);	

	/* Free the MTD device structure */
	kfree(ide_mtd);
}
module_exit(ide_cleanup);
#endif

MODULE_LICENSE("GPL");
MODULE_AUTHOR("William J Beksi <wjbeksi@users.sourceforge.net>");
MODULE_DESCRIPTION("Glue layer for NAND flash through an IDE interface");

Re: [PATCH] command function for nand flash through IDE

[Thomas Gleixner]

On Thu, 2004-12-16 at 21:11 +0800, William J Beksi wrote:
> Hi,
> This driver includes command and select chip functions specifically for  
> accessing nand flash through an IDE port. Should be useful for anyone 
> developing and testing on a PC. It works with the latest MTD snapshot.

Works == compiles ?

Do you expect, that the read/write/verify functions in nand_base.c will
work? Your IO_ADDR_R/W values are representing an I/O port address so
the readb/writeb macros in the generic read/write/verify functions will
just oops.

It's definitely not necessary to copy the command function. Please read
the NAND API documentation and use an appropriate hw_control function
(See the address lines based example). 

tglx

Re: [PATCH] command function for nand flash through IDE

[Thomas Gleixner]

Hi William,

can we keep this on the list please, as others are interested and we
have it in the archive so people encountering similar problems can find
it ?

On Tue, 2004-12-21 at 18:19 +0800, William J Beksi wrote:
> I can load the module, read and write images to the flash.

Strange. Did you change anything in nand_base.c ?

> >Do you expect, that the read/write/verify functions in nand_base.c will
> >work? Your IO_ADDR_R/W values are representing an I/O port address so
> >the readb/writeb macros in the generic read/write/verify functions will
> >just oops.
> >
> Sorry for the confusion. My hardware does not have any address lines. I 
> just access the ide interface directly by defining the ide1 address:
> #define IDE_IO_BASE 0x1F0
> I then use IDE_IO_BASE+1 for the write command and IDE_IO_BASE+2 for the 
> write address command.

It has addresslines :) 

You write to 0x1f0, 0x1f1 and 0x1f2. 

The CLE line of the NAND is connected to A0 (Address line 0) and the ALE
line is connected to A1 (Address line 1) of the IDE interface.

If you don't believe me, ask your hardware guy. 

> That's why I rewrote the nand_command function, leaving out the 
> hwcontrol function, and using outb directly. Is their another way to do 
> this so that it conforms with the nand api?

Implement hwcontrol function

case CLE: this->io_addr_w = IDE_IO_BASE+1; break;
case nCLE: this->io_addr_w = IDE_IO_BASE; break;
case ALE: this->io_addr_w = IDE_IO_BASE+2; break;
case nALE: this->io_addr_w = IDE_IO_BASE; break;

There is also an example in the NAND API documentation.

> Also, why do you use the writeb and readb macros instead of using 
> outb/inb directly?

Because all of the drivers in MTD/NAND use memory mapped devices, which
cannot be accessed with outb/inb. 

But, this can be implemented simply in nand_base.c with a config_switch
NAND_USE_IO_INSTR, so you can select it during compile time. I will do
that, because it makes sense.

tglx

Re: [PATCH] command function for nand flash through IDE

[William J Beksi]

[-- Attachment #1: Type: text/plain, Size: 671 bytes --]

Thomas Gleixner wrote:

> Implement hwcontrol function
>
>case CLE: this->io_addr_w = IDE_IO_BASE+1; break;
>case nCLE: this->io_addr_w = IDE_IO_BASE; break;
>case ALE: this->io_addr_w = IDE_IO_BASE+2; break;
>case nALE: this->io_addr_w = IDE_IO_BASE; break;
>
>There is also an example in the NAND API documentation.
>  
>
Hi Thomas,
I've implemented the hwcontrol function as per the NAND API 
documentation. I did not use the ioremap because the i/o port addresses 
170-17F and 1F0-1FF are reserved for the IDE controller. I've spent the 
last week testing this driver and I hope it can be commited to the cvs 
if you find it useful.

Thank you for your help,
William

[-- Attachment #2: ide.c --]
[-- Type: text/x-c, Size: 3948 bytes --]

/* drivers/mtd/nand/ide.c
 *
 * Copyright (C) 2004  William J Beksi <wjbeksi@users.sourceforge.net> 
 *
 * Overview:
 *  This device driver allows a NAND flash device to be accessed from
 *  an IDE controller.  
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or 
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA  02111, USA.
 */

#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/module.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/partitions.h>
#include <linux/delay.h>
#include <asm/io.h>

/*
 * Values specific to the IDE
 */
#define IDE_IO_BASE_1 0x1F0		/* IDE1 NAND flash I/O base address */
#define IDE_IO_BASE_2 0x170		/* IDE2 NAND flash I/O base address */

#define IDE_IO_BASE IDE_IO_BASE_1

/*
 * IDE MTD structure
 */
static struct mtd_info *ide_mtd = NULL;

/*
 * Define partitions for flash device
 */
const static struct mtd_partition partition_info[] = {
	{ 
		.name   = "IDE flash partition 1", 
		.offset = 0,  
		.size   = 3*1024*1024 
	},
	{
		.name   = "IDE flash partition 2",
		.offset = 3*1024*1024,
		.size   = 3*1024*1024
	}
};
#define NUM_PARTITIONS  2 

static void ide_hwcontrol(struct mtd_info *mtd, int cmd) 
{
	struct nand_chip *this = (struct nand_chip *) mtd->priv;

	switch (cmd) {
		case NAND_CTL_SETCLE: this->IO_ADDR_W = (unsigned char *) IDE_IO_BASE+1; break;
		case NAND_CTL_CLRCLE: this->IO_ADDR_W = (unsigned char *) IDE_IO_BASE;   break;
		case NAND_CTL_SETALE: this->IO_ADDR_W = (unsigned char *) IDE_IO_BASE+2; break;	
		case NAND_CTL_CLRALE: this->IO_ADDR_W = (unsigned char *) IDE_IO_BASE;   break;
	}
}

/*
 * Main initialization routine
 */
int __init ide_init(void)
{
	struct nand_chip *this;
	int err = 0;

	/* Allocate memory for MTD device structure and private data */
	ide_mtd = kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip), GFP_KERNEL);
	if (!ide_mtd) {
		printk("Unable to allocate IDE NAND MTD structure\n");
		err = -ENOMEM; 
		goto out;
	}

	/* Initialize structures */
	memset((char *) ide_mtd, 0, sizeof(struct mtd_info) + sizeof(struct nand_chip));

	/* Get pointer to private data */
	this = (struct nand_chip *) (&ide_mtd[1]);
	/* Link the private data with the MTD structure */
	ide_mtd->priv = this;

	/* Set address of NAND IO lines */
	this->IO_ADDR_R  = (void __iomem *) IDE_IO_BASE;
	this->IO_ADDR_W  = (void __iomem *) IDE_IO_BASE;
	/* Reference hardware control function */
	this->hwcontrol = ide_hwcontrol;
	/* Set command delay time */
	this->chip_delay = 20;
	/* Assign the device ready function */
	this->dev_ready = NULL;
	/* Set the ECC generator mode */
	this->eccmode = NAND_ECC_SOFT;

	/* Scan to find existance of the device */
	if (nand_scan(ide_mtd, 1)) {
		err = -ENXIO;
		goto out_mtd;
	}

	/* Register the partitions */
	add_mtd_partitions(ide_mtd, partition_info, NUM_PARTITIONS);
	goto out;

out_mtd:
	kfree(ide_mtd);
out:
	return err;
}
module_init(ide_init);

/*
 * Clean up routine
 */
#ifdef MODULE
static void __exit ide_cleanup (void)
{
	/* Release resources, unregister the device */
	nand_release(ide_mtd);	

	/* Free the MTD device structure */
	kfree(ide_mtd);
}
module_exit(ide_cleanup);
#endif

MODULE_LICENSE("GPL");
MODULE_AUTHOR("William J Beksi <wjbeksi@users.sourceforge.net>");
MODULE_DESCRIPTION("Glue layer for NAND flash through an IDE controller");

Re: [PATCH] command function for nand flash through IDE

[Thomas Gleixner]

On Fri, 2004-12-31 at 12:14 +0800, William J Beksi wrote:
> Thomas Gleixner wrote:
> 
> > Implement hwcontrol function
> >
> >case CLE: this->io_addr_w = IDE_IO_BASE+1; break;
> >case nCLE: this->io_addr_w = IDE_IO_BASE; break;
> >case ALE: this->io_addr_w = IDE_IO_BASE+2; break;
> >case nALE: this->io_addr_w = IDE_IO_BASE; break;
> >
> >There is also an example in the NAND API documentation.
> >  
> >
> Hi Thomas,
> I've implemented the hwcontrol function as per the NAND API 
> documentation. I did not use the ioremap because the i/o port addresses 
> 170-17F and 1F0-1FF are reserved for the IDE controller. I've spent the 
> last week testing this driver and I hope it can be commited to the cvs 
> if you find it useful.
> 

Hi William,

looks better now. Can you please provide patches for Makefile and
KConfig too ?

I still have a question. Did you modify nand_base.c ? What ARCH/Platform
are you using ?

tglx

Re: [PATCH] command function for nand flash through IDE

[William J Beksi]

Thomas Gleixner wrote:

>Can you please provide patches for Makefile and
>KConfig too ?
>  
>
Sure, no problem.

>I still have a question. Did you modify nand_base.c ? 
>
No, I only add a compile time switch as you recommended because I want 
to use outb/inb.

>What ARCH/Platform
>are you using ?
>  
>
i386
-- 
William

Re: [PATCH] command function for nand flash through IDE

[Thomas Gleixner]

On Sat, 2005-01-01 at 18:50 +0800, William J Beksi wrote:

> >I still have a question. Did you modify nand_base.c ? 
> >
> No, I only add a compile time switch as you recommended because I want 
> to use outb/inb.

Can you please provide a patch for this too ?

tglx

Re: [PATCH] command function for nand flash through IDE

[William J Beksi]

[-- Attachment #1: Type: text/plain, Size: 462 bytes --]

Thomas Gleixner wrote:

>On Sat, 2005-01-01 at 18:50 +0800, William J Beksi wrote:
>
>  
>
>>>I still have a question. Did you modify nand_base.c ? 
>>>
>>>      
>>>
>>No, I only add a compile time switch as you recommended because I want 
>>to use outb/inb.
>>    
>>
>
>Can you please provide a patch for this too ?
>  
>
Hi Thomas,
This patch allows you to select the i/o instruction you want to use 
(writeb/readb or outb/inb) at compile time.

-- 
William

[-- Attachment #2: nand_base.c.patch --]
[-- Type: text/x-patch, Size: 2139 bytes --]

--- /opt/mtd/drivers/mtd/nand/nand_base.c	2004-12-14 07:00:18.000000000 +0800
+++ nand_base.c	2005-01-01 21:58:19.000000000 +0800
@@ -66,6 +66,8 @@
 #include <linux/mtd/partitions.h>
 #endif
 
+#define NAND_USE_IO_INSTR	1
+
 /* Define default oob placement schemes for large and small page devices */
 static struct nand_oobinfo nand_oob_8 = {
 	.useecc = MTD_NANDECC_AUTOPLACE,
@@ -171,7 +173,13 @@
 static u_char nand_read_byte(struct mtd_info *mtd)
 {
 	struct nand_chip *this = mtd->priv;
-	return readb(this->IO_ADDR_R);
+
+	switch(NAND_USE_IO_INSTR) {
+	case 0:
+		return readb(this->IO_ADDR_R);
+	case 1:
+		return inb((unsigned int) this->IO_ADDR_R);
+	}
 }
 
 /**
@@ -184,7 +192,15 @@
 static void nand_write_byte(struct mtd_info *mtd, u_char byte)
 {
 	struct nand_chip *this = mtd->priv;
-	writeb(byte, this->IO_ADDR_W);
+
+	switch(NAND_USE_IO_INSTR) {
+	case 0:
+		writeb(byte, this->IO_ADDR_W);
+		break;
+	case 1:
+		outb(byte, (unsigned int) this->IO_ADDR_W);
+		break;
+	}
 }
 
 /**
@@ -277,8 +293,16 @@
 	int i;
 	struct nand_chip *this = mtd->priv;
 
-	for (i=0; i<len; i++)
-		writeb(buf[i], this->IO_ADDR_W);
+	switch(NAND_USE_IO_INSTR) {
+	case 0:
+		for (i=0; i<len; i++)
+			writeb(buf[i], this->IO_ADDR_W);
+		break;
+	case 1:
+		for (i=0; i<len; i++)
+			outb(buf[i], (unsigned int) this->IO_ADDR_W);
+		break;
+	}
 }
 
 /**
@@ -294,8 +318,16 @@
 	int i;
 	struct nand_chip *this = mtd->priv;
 
-	for (i=0; i<len; i++)
-		buf[i] = readb(this->IO_ADDR_R);
+	switch(NAND_USE_IO_INSTR) {
+	case 0:
+		for (i=0; i<len; i++)
+			buf[i] = readb(this->IO_ADDR_R);
+		break;
+	case 1:
+		for (i=0; i<len; i++)
+			buf[i] = inb((unsigned int) this->IO_ADDR_R);
+		break;
+	}
 }
 
 /**
@@ -311,10 +343,18 @@
 	int i;
 	struct nand_chip *this = mtd->priv;
 
-	for (i=0; i<len; i++)
-		if (buf[i] != readb(this->IO_ADDR_R))
-			return -EFAULT;
-
+	switch(NAND_USE_IO_INSTR) {
+	case 0:
+		for (i=0; i<len; i++)
+			if (buf[i] != readb(this->IO_ADDR_R))
+				return -EFAULT;
+		break;
+	case 1:
+		for (i=0; i<len; i++)
+			if (buf[i] != inb((unsigned int) this->IO_ADDR_R))
+				return -EFAULT;
+		break;
+	}
 	return 0;
 }