From: "David A. Marlin" <dmarlin@redhat.com>
To: tglx@linutronix.de
Cc: MTD List <linux-mtd@lists.infradead.org>
Subject: Re: additional error checks for AG-AND erase/write
Date: Tue, 18 Jan 2005 12:08:55 -0600 [thread overview]
Message-ID: <41ED50B7.9000107@redhat.com> (raw)
In-Reply-To: 1106068748.16877.109.camel@tglx.tec.linutronix.de
Thomas Gleixner wrote:
> On Tue, 2005-01-18 at 09:43 -0600, David A. Marlin wrote:
>
>>The Renesas AG-AND chips support additional error checking on erase and
>>write operations beyond just checking the operation status. I think the
>>logic is that since ECC can correct 2-bit errors on read, if only a
>>single bit error occurs on and erase or write the operation should not
>>be considered FAIL. Even if a single bit error occurs on read (in
>>addition to the single bit error on write), it will still be corrected
>>and no data will be lost.
>
> Hmm, have you other information ?
Yes. Please see the flowcharts on pages 35 and 36 of the HN29V1G91T-30
data sheet. They show the additional checks I referred to.
>>From the data sheet:
>
> When an error occurs in program page, block replacement including
> corresponding page should be done.
> ...
> When an error occurs in erase operation, future access to this bad block
> is prohibited.
>
> An error on erase is definitely a criteria for putting the block on the
> bad list. Actually JFFS2 tries to erase it again before sorting it out.
>
> The single bit programming error does not make a lot of sense to me, as
> you always have to do RS error correction when you read the page, which
> results in a nice performance penalty. And its a clear sign that
> something went wrong. We try to reuse the block, see above.
I would not disagree, but the Renesas considers this a "feature" of
their chips that they would like to see supported. It could be that
they are trying to avoid marking blocks bad, since doing so makes 128KiB
unusable (JFFS2 virtual erase block size), and they think it is worth
the performance hit. I'm just trying to figure out if it is practical
to implement in the current driver.
I have hacked nand_base.c to implement part of the logic (extra status
checks and read), but these are not really acceptable changes (just
something to test with), and I haven't worked out where to check for
single bit errors yet (probably in read_ecc). I'm still trying to find
a "less invasive" approach that might be acceptable.
d.marlin
next prev parent reply other threads:[~2005-01-18 18:04 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2005-01-18 15:43 additional error checks for AG-AND erase/write David A. Marlin
2005-01-18 17:19 ` Thomas Gleixner
2005-01-18 18:08 ` David A. Marlin [this message]
2005-01-18 21:15 ` Thomas Gleixner
2005-01-20 22:35 ` David A. Marlin
2005-01-21 9:27 ` Thomas Gleixner
2005-01-21 15:04 ` David A. Marlin
2005-01-22 9:05 ` Thomas Gleixner
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=41ED50B7.9000107@redhat.com \
--to=dmarlin@redhat.com \
--cc=linux-mtd@lists.infradead.org \
--cc=tglx@linutronix.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox